From: Guodong Xu <guodong.xu@oss.qualcomm.com>
To: "rkrcmar@qti.qualcomm.com" <rkrcmar@qti.qualcomm.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Conor Dooley <conor@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"spacemit@lists.linux.dev" <spacemit@lists.linux.dev>,
"sophgo@lists.linux.dev" <sophgo@lists.linux.dev>,
"linux-kselftest@vger.kernel.org"
<linux-kselftest@vger.kernel.org>,
Andy Chiu <tchiu@tenstorrent.com>,
Florian Weimer <fweimer@redhat.com>,
Peter Bergner <bergner@oss.tenstorrent.com>,
Zihong Yao <zihong.plct@isrc.iscas.ac.cn>,
Mark Harris <mark.hsj@gmail.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Andrew Jones <andrew.jones@oss.qualcomm.com>,
Conor Dooley <conor.dooley@microchip.com>,
Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Chen Wang <chen.wang@linux.dev>,
Inochi Amaoto <inochiama@gmail.com>,
Randy Dunlap <rdunlap@infradead.org>
Subject: Re: [PATCH v8 01/11] riscv: Add B to hwcap and hwprobe
Date: Fri, 02 Oct 2026 05:22:41 -0400 [thread overview]
Message-ID: <2f143e2e0698daa43191ff3463e604d2.guodong.xu@oss.qualcomm.com> (raw)
In-Reply-To: <DLRWB8R7P6SF.1XIL0OXLZ2F23@qti.qualcomm.com>
Hi Radim,
On Tue, 29 Sep 2026 15:12:36 +0000, Radim Krcmar wrote:
> Are we sure that B will always be listed in the ISA string when Zba,
> Zbb, and Zbs are present?
For DT, yes. The binding requires b whenever zba, zbb and zbs are
listed, since commit 0cdb7fc1879b ("dt-bindings: riscv: Add B ISA
extension description").
For ACPI there is no such check. But B is a ratified RVI extension
and RVA23U64 lists it as mandatory [1], so any serious hardware vendor
should respect it. Right?
If the firmware does not advertise B, why should the kernel correct that
for them? This came up in v2 [2], and maybe here I should quote what Conor
said in [3], which I agree with:
" Part of me wants to know why we should be going to a bunch of effort
to cover up for inaccurate devicetrees etc. Garbage in -> garbage out
and let them keep the pieces."
[1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-ratified
[2] https://lore.kernel.org/linux-riscv/CAH1PCMa-5W9PsX8cDLUk6-MkcM53HOz2QtaxCHd+XOr7DgH5+w@mail.gmail.com/
[3] https://lore.kernel.org/all/20260604-decency-salaried-4cb69e1c9fa9@spud/
Guodong
next prev parent reply other threads:[~2026-10-02 9:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-20 7:18 [PATCH v8 00/11] riscv: hwprobe: Expose RVA23U64 base behavior Guodong Xu
2026-09-20 7:18 ` [PATCH v8 01/11] riscv: Add B to hwcap and hwprobe Guodong Xu
2026-09-21 14:24 ` Heinrich Schuchardt
2026-09-24 10:38 ` Guodong Xu
2026-09-29 15:12 ` Radim Krcmar
2026-09-29 16:30 ` Heinrich Schuchardt
2026-09-29 19:24 ` Conor Dooley
2026-10-02 9:22 ` Guodong Xu [this message]
2026-10-02 13:00 ` Radim Krcmar
2026-09-20 7:18 ` [PATCH v8 02/11] dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz Guodong Xu
2026-09-20 7:18 ` [PATCH v8 03/11] dt-bindings: riscv: Add Zic64b extension description Guodong Xu
2026-09-20 7:18 ` [PATCH v8 04/11] riscv: Add Zic64b to cpufeature and hwprobe Guodong Xu
2026-09-20 7:18 ` [PATCH v8 05/11] riscv: dts: spacemit: k3: Add Zic64b ISA extension Guodong Xu
2026-09-20 7:18 ` [PATCH v8 06/11] riscv: dts: spacemit: k1: " Guodong Xu
2026-09-20 7:18 ` [PATCH v8 07/11] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-09-20 7:18 ` [PATCH v8 08/11] riscv: Add a getter for user PMLEN support Guodong Xu
2026-09-20 7:18 ` [PATCH v8 09/11] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Guodong Xu
2026-09-20 7:18 ` [PATCH v8 10/11] riscv: cpu: Output isa bases lines in cpuinfo Guodong Xu
2026-09-20 7:18 ` [PATCH v8 11/11] riscv: hwprobe: Introduce rva23u64 base behavior Guodong Xu
2026-09-29 16:00 ` Radim Krcmar
2026-10-02 8:40 ` Guodong Xu
2026-10-02 12:48 ` Radim Krcmar
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