* [PATCH 0/1] Introduce Lemans EVK Peripheral Mezzanine @ 2026-01-29 17:28 Umang Chheda 2026-01-29 17:28 ` [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine Umang Chheda 0 siblings, 1 reply; 7+ messages in thread From: Umang Chheda @ 2026-01-29 17:28 UTC (permalink / raw) To: andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran Cc: linux-arm-msm, devicetree, linux-kernel, umang.chheda, mohd.anwar, krishna.chundru, monish.chunara Introduce device tree support for the Mezzanine peripheral expansion card used with the Qualcomm Lemans Evaluation Kit (EVK). The Lemans Mezzanine is an additional add-on card which can be stacked on top of Lemans-evk board to extend peripheral capabilities of Lemans-evk used for industrial applications. It connects via expansion headers on the lemans-evk and provides following peripherals : - 4x Type A USB ports in host mode. - TC9563 PCIe switch, which has following three downstream ports (DSP) : - 1st DSP connects M.2 E-key connector for connecting WLAN endpoints. - 2nd DSP connect M.2 B-key connector for connecting cellular modems. - 3rd DSP with support for Dual Ethernet ports. - eMMC. - Additional 2.5GbE Ethernet PHY connected to native EMAC with support for MAC Address configuration via NVMEM. - EEPROM. - LVDS Display. - 2*mini DP. Umang Chheda (1): arm64: dts: qcom: lemans-evk: Add Mezzanine arch/arm64/boot/dts/qcom/Makefile | 4 + .../boot/dts/qcom/lemans-evk-mezzanine.dtso | 301 ++++++++++++++++++ 2 files changed, 305 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-29 17:28 [PATCH 0/1] Introduce Lemans EVK Peripheral Mezzanine Umang Chheda @ 2026-01-29 17:28 ` Umang Chheda 2026-01-30 10:51 ` Konrad Dybcio 2026-01-30 10:53 ` Konrad Dybcio 0 siblings, 2 replies; 7+ messages in thread From: Umang Chheda @ 2026-01-29 17:28 UTC (permalink / raw) To: andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran Cc: linux-arm-msm, devicetree, linux-kernel, umang.chheda, mohd.anwar, krishna.chundru, monish.chunara The Mezzanine is an hardware expansion add-on board designed to be stacked on top of Lemans EVK. It has following peripherals : - 4x Type A USB ports in host mode. - TC9563 PCIe switch, which has following three downstream ports (DSP) : - 1st DSP connects M.2 E-key connector for connecting WLAN endpoints. - 2nd DSP connects M.2 B-key connector for connecting cellular modems. - 3rd DSP with support for Dual Ethernet ports. - eMMC. - Additional 2.5GbE Ethernet PHY connected to native EMAC with support for MAC Address configuration via NVMEM. - EEPROM. - LVDS Display. - 2*mini DP. Add support for following peripherals : - TC9563 PCIe Switch. - Additional 2.5GbE Ethernet Port. - EEPROM. Written with inputs from : Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet. Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM. Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../boot/dts/qcom/lemans-evk-mezzanine.dtso | 301 ++++++++++++++++++ 2 files changed, 305 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index f80b5d9cf1e8..79449004adfd 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -43,6 +43,10 @@ dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera.dtb lemans-evk-el2-dtbs := lemans-evk.dtb lemans-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-el2.dtb + +lemans-evk-mezzanine-dtbs := lemans-evk.dtb lemans-evk-mezzanine.dtbo + +dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += milos-fairphone-fp6.dtb dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso new file mode 100644 index 000000000000..a0dc6daec754 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/gpio/gpio.h> + +&{/} { + model = "Qualcomm Technologies, Inc. Lemans-evk Mezzanine"; + + vreg_sys_pwr: regulator-vreg-sys-pwr { + compatible = "regulator-fixed"; + regulator-name = "VREG_SYS_PWR"; + + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <24000000>; + regulator-max-microvolt = <24000000>; + }; + + vreg_4p2: regulator-vreg-4p2 { + compatible = "regulator-fixed"; + regulator-name = "VREG_4P2"; + + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + + vin-supply = <&vreg_sys_pwr>; + }; + + vreg_1p8: regulator-vreg-1p8 { + compatible = "regulator-fixed"; + regulator-name = "VREG_1P8"; + + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + vin-supply = <&vreg_4p2>; + }; + + vreg_3p3: regulator-vreg-3p3 { + compatible = "regulator-fixed"; + regulator-name = "VREG_3P3"; + + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vreg_4p2>; + }; + + vreg_0p9: regulator-vreg-0p9 { + compatible = "regulator-fixed"; + regulator-name = "VREG_0P9"; + + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + vin-supply = <&vreg_3p3>; + }; +}; + +ðernet1 { + phy-handle = <&hsgmii_phy1>; + phy-mode = "2500base-x"; + + pinctrl-0 = <ðernet1_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup1>; + snps,mtl-tx-config = <&mtl_tx_setup1>; + + nvmem-cells = <&mac_addr1>; + nvmem-cell-names = "mac-address"; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + hsgmii_phy1: ethernet-phy@18 { + compatible = "ethernet-phy-id004d.d101"; + reg = <0x18>; + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + }; + + mtl_rx_setup1: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup1: tx-queues-config { + snps,tx-queues-to-use = <4>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + +&i2c18 { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@52 { + compatible = "giantec,gt24c256c", "atmel,24c256"; + reg = <0x52>; + pagesize = <64>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_addr1: mac-addr@0 { + reg = <0x0 0x6>; + }; + }; + }; +}; + +&pcie0 { + iommu-map = <0x0 &pcie_smmu 0x0 0x1>, + <0x100 &pcie_smmu 0x1 0x1>, + <0x208 &pcie_smmu 0x2 0x1>, + <0x210 &pcie_smmu 0x3 0x1>, + <0x218 &pcie_smmu 0x4 0x1>, + <0x300 &pcie_smmu 0x5 0x1>, + <0x400 &pcie_smmu 0x6 0x1>, + <0x500 &pcie_smmu 0x7 0x1>, + <0x501 &pcie_smmu 0x8 0x1>; +}; + +&pcieport0 { + #address-cells = <3>; + #size-cells = <2>; + + pcie@0,0 { + compatible = "pci1179,0623"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x2 0xff>; + + vddc-supply = <&vreg_0p9>; + vdd18-supply = <&vreg_1p8>; + vdd09-supply = <&vreg_0p9>; + vddio1-supply = <&vreg_1p8>; + vddio2-supply = <&vreg_1p8>; + vddio18-supply = <&vreg_1p8>; + + i2c-parent = <&i2c18 0x77>; + + resx-gpios = <&tlmm 140 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&tc9563_resx_n>; + pinctrl-names = "default"; + + pcie@1,0 { + reg = <0x20800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x3 0xff>; + }; + + pcie@2,0 { + reg = <0x21000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x4 0xff>; + }; + + pcie@3,0 { + reg = <0x21800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x5 0xff>; + + pci@0,0 { + reg = <0x50000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + }; + + pci@0,1 { + reg = <0x50100 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + }; + }; + }; +}; + +&serdes1 { + phy-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&tlmm { + ethernet1_default: ethernet1-default-state { + ethernet1_mdc: ethernet1-mdc-pins { + pins = "gpio20"; + function = "emac1_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet1_mdio: ethernet1-mdio-pins { + pins = "gpio21"; + function = "emac1_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + tc9563_resx_n: tc9563-resx-state { + pins = "gpio140"; + function = "gpio"; + + bias-disable; + input-disable; + output-enable; + power-source = <0>; + }; +}; -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-29 17:28 ` [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine Umang Chheda @ 2026-01-30 10:51 ` Konrad Dybcio 2026-02-02 19:31 ` Umang Chheda 2026-01-30 10:53 ` Konrad Dybcio 1 sibling, 1 reply; 7+ messages in thread From: Konrad Dybcio @ 2026-01-30 10:51 UTC (permalink / raw) To: Umang Chheda, andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran Cc: linux-arm-msm, devicetree, linux-kernel, mohd.anwar, krishna.chundru, monish.chunara On 1/29/26 6:28 PM, Umang Chheda wrote: > The Mezzanine is an hardware expansion add-on board designed > to be stacked on top of Lemans EVK. > > It has following peripherals : > > - 4x Type A USB ports in host mode. > - TC9563 PCIe switch, which has following three downstream ports (DSP) : > - 1st DSP connects M.2 E-key connector for connecting WLAN endpoints. > - 2nd DSP connects M.2 B-key connector for connecting cellular modems. > - 3rd DSP with support for Dual Ethernet ports. > - eMMC. > - Additional 2.5GbE Ethernet PHY connected to native EMAC with support for > MAC Address configuration via NVMEM. > - EEPROM. > - LVDS Display. > - 2*mini DP. > > Add support for following peripherals : > - TC9563 PCIe Switch. > - Additional 2.5GbE Ethernet Port. > - EEPROM. > > Written with inputs from : > Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet. > Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe > Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM. > > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 4 + > .../boot/dts/qcom/lemans-evk-mezzanine.dtso | 301 ++++++++++++++++++ > 2 files changed, 305 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index f80b5d9cf1e8..79449004adfd 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -43,6 +43,10 @@ dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera.dtb > lemans-evk-el2-dtbs := lemans-evk.dtb lemans-el2.dtbo > > dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-el2.dtb > + > +lemans-evk-mezzanine-dtbs := lemans-evk.dtb lemans-evk-mezzanine.dtbo > + > +dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-mezzanine.dtb > dtb-$(CONFIG_ARCH_QCOM) += milos-fairphone-fp6.dtb > dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb > diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso > new file mode 100644 > index 000000000000..a0dc6daec754 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso > @@ -0,0 +1,301 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/gpio/gpio.h> > + > +&{/} { > + model = "Qualcomm Technologies, Inc. Lemans-evk Mezzanine"; > + > + vreg_sys_pwr: regulator-vreg-sys-pwr { > + compatible = "regulator-fixed"; > + regulator-name = "VREG_SYS_PWR"; > + > + regulator-always-on; > + regulator-boot-on; nit: usually we put these at the end [...] > +&tlmm { > + ethernet1_default: ethernet1-default-state { > + ethernet1_mdc: ethernet1-mdc-pins { You can drop the labels for these inner entries, as you never reference them Konrad ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-30 10:51 ` Konrad Dybcio @ 2026-02-02 19:31 ` Umang Chheda 0 siblings, 0 replies; 7+ messages in thread From: Umang Chheda @ 2026-02-02 19:31 UTC (permalink / raw) To: Konrad Dybcio, andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran Cc: linux-arm-msm, devicetree, linux-kernel, mohd.anwar, krishna.chundru, monish.chunara Hello Konrad, On 1/30/2026 4:21 PM, Konrad Dybcio wrote: > On 1/29/26 6:28 PM, Umang Chheda wrote: >> The Mezzanine is an hardware expansion add-on board designed >> to be stacked on top of Lemans EVK. >> >> It has following peripherals : >> >> - 4x Type A USB ports in host mode. >> - TC9563 PCIe switch, which has following three downstream ports (DSP) : >> - 1st DSP connects M.2 E-key connector for connecting WLAN endpoints. >> - 2nd DSP connects M.2 B-key connector for connecting cellular modems. >> - 3rd DSP with support for Dual Ethernet ports. >> - eMMC. >> - Additional 2.5GbE Ethernet PHY connected to native EMAC with support for >> MAC Address configuration via NVMEM. >> - EEPROM. >> - LVDS Display. >> - 2*mini DP. >> >> Add support for following peripherals : >> - TC9563 PCIe Switch. >> - Additional 2.5GbE Ethernet Port. >> - EEPROM. >> >> Written with inputs from : >> Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet. >> Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe >> Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM. >> >> Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 4 + >> .../boot/dts/qcom/lemans-evk-mezzanine.dtso | 301 ++++++++++++++++++ >> 2 files changed, 305 insertions(+) >> create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index f80b5d9cf1e8..79449004adfd 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -43,6 +43,10 @@ dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-camera.dtb >> lemans-evk-el2-dtbs := lemans-evk.dtb lemans-el2.dtbo >> >> dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-el2.dtb >> + >> +lemans-evk-mezzanine-dtbs := lemans-evk.dtb lemans-evk-mezzanine.dtbo >> + >> +dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-mezzanine.dtb >> dtb-$(CONFIG_ARCH_QCOM) += milos-fairphone-fp6.dtb >> dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb >> dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb >> diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso >> new file mode 100644 >> index 000000000000..a0dc6daec754 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/lemans-evk-mezzanine.dtso >> @@ -0,0 +1,301 @@ >> +// SPDX-License-Identifier: BSD-3-Clause >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include <dt-bindings/gpio/gpio.h> >> + >> +&{/} { >> + model = "Qualcomm Technologies, Inc. Lemans-evk Mezzanine"; >> + >> + vreg_sys_pwr: regulator-vreg-sys-pwr { >> + compatible = "regulator-fixed"; >> + regulator-name = "VREG_SYS_PWR"; >> + >> + regulator-always-on; >> + regulator-boot-on; > nit: usually we put these at the end Ack > > [...] > >> +&tlmm { >> + ethernet1_default: ethernet1-default-state { >> + ethernet1_mdc: ethernet1-mdc-pins { > You can drop the labels for these inner entries, as you never > reference them Ack > > Konrad Thanks, Umang ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-29 17:28 ` [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine Umang Chheda 2026-01-30 10:51 ` Konrad Dybcio @ 2026-01-30 10:53 ` Konrad Dybcio 2026-01-30 20:11 ` Andrew Lunn 1 sibling, 1 reply; 7+ messages in thread From: Konrad Dybcio @ 2026-01-30 10:53 UTC (permalink / raw) To: Umang Chheda, andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran, Andrew Lunn Cc: linux-arm-msm, devicetree, linux-kernel, mohd.anwar, krishna.chundru, monish.chunara On 1/29/26 6:28 PM, Umang Chheda wrote: > The Mezzanine is an hardware expansion add-on board designed > to be stacked on top of Lemans EVK. [...] > +ðernet1 { > + phy-handle = <&hsgmii_phy1>; > + phy-mode = "2500base-x"; +Andrew could you please take a look at the eth setup? Konrad > + > + pinctrl-0 = <ðernet1_default>; > + pinctrl-names = "default"; > + > + snps,mtl-rx-config = <&mtl_rx_setup1>; > + snps,mtl-tx-config = <&mtl_tx_setup1>; > + > + nvmem-cells = <&mac_addr1>; > + nvmem-cell-names = "mac-address"; > + > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + hsgmii_phy1: ethernet-phy@18 { > + compatible = "ethernet-phy-id004d.d101"; > + reg = <0x18>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + }; > + > + mtl_rx_setup1: rx-queues-config { > + snps,rx-queues-to-use = <4>; > + snps,rx-sched-sp; > + > + queue0 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x0>; > + snps,route-up; > + snps,priority = <0x1>; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x1>; > + snps,route-ptp; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x2>; > + snps,route-avcp; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x3>; > + snps,priority = <0xc>; > + }; > + }; > + > + mtl_tx_setup1: tx-queues-config { > + snps,tx-queues-to-use = <4>; > + > + queue0 { > + snps,dcb-algorithm; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + }; > +}; > + > +&i2c18 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + eeprom@52 { > + compatible = "giantec,gt24c256c", "atmel,24c256"; > + reg = <0x52>; > + pagesize = <64>; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mac_addr1: mac-addr@0 { > + reg = <0x0 0x6>; > + }; > + }; > + }; > +}; > + > +&pcie0 { > + iommu-map = <0x0 &pcie_smmu 0x0 0x1>, > + <0x100 &pcie_smmu 0x1 0x1>, > + <0x208 &pcie_smmu 0x2 0x1>, > + <0x210 &pcie_smmu 0x3 0x1>, > + <0x218 &pcie_smmu 0x4 0x1>, > + <0x300 &pcie_smmu 0x5 0x1>, > + <0x400 &pcie_smmu 0x6 0x1>, > + <0x500 &pcie_smmu 0x7 0x1>, > + <0x501 &pcie_smmu 0x8 0x1>; > +}; > + > +&pcieport0 { > + #address-cells = <3>; > + #size-cells = <2>; > + > + pcie@0,0 { > + compatible = "pci1179,0623"; > + reg = <0x10000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x2 0xff>; > + > + vddc-supply = <&vreg_0p9>; > + vdd18-supply = <&vreg_1p8>; > + vdd09-supply = <&vreg_0p9>; > + vddio1-supply = <&vreg_1p8>; > + vddio2-supply = <&vreg_1p8>; > + vddio18-supply = <&vreg_1p8>; > + > + i2c-parent = <&i2c18 0x77>; > + > + resx-gpios = <&tlmm 140 GPIO_ACTIVE_LOW>; > + > + pinctrl-0 = <&tc9563_resx_n>; > + pinctrl-names = "default"; > + > + pcie@1,0 { > + reg = <0x20800 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x3 0xff>; > + }; > + > + pcie@2,0 { > + reg = <0x21000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + > + device_type = "pci"; > + ranges; > + bus-range = <0x4 0xff>; > + }; > + > + pcie@3,0 { > + reg = <0x21800 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + bus-range = <0x5 0xff>; > + > + pci@0,0 { > + reg = <0x50000 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + }; > + > + pci@0,1 { > + reg = <0x50100 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + ranges; > + }; > + }; > + }; > +}; > + > +&serdes1 { > + phy-supply = <&vreg_l5a>; > + > + status = "okay"; > +}; > + > +&tlmm { > + ethernet1_default: ethernet1-default-state { > + ethernet1_mdc: ethernet1-mdc-pins { > + pins = "gpio20"; > + function = "emac1_mdc"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + > + ethernet1_mdio: ethernet1-mdio-pins { > + pins = "gpio21"; > + function = "emac1_mdio"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + }; > + > + tc9563_resx_n: tc9563-resx-state { > + pins = "gpio140"; > + function = "gpio"; > + > + bias-disable; > + input-disable; > + output-enable; > + power-source = <0>; > + }; > +}; > -- > 2.34.1 > > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-30 10:53 ` Konrad Dybcio @ 2026-01-30 20:11 ` Andrew Lunn 2026-02-02 10:17 ` Konrad Dybcio 0 siblings, 1 reply; 7+ messages in thread From: Andrew Lunn @ 2026-01-30 20:11 UTC (permalink / raw) To: Konrad Dybcio Cc: Umang Chheda, andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran, linux-arm-msm, devicetree, linux-kernel, mohd.anwar, krishna.chundru, monish.chunara On Fri, Jan 30, 2026 at 11:53:09AM +0100, Konrad Dybcio wrote: > On 1/29/26 6:28 PM, Umang Chheda wrote: > > The Mezzanine is an hardware expansion add-on board designed > > to be stacked on top of Lemans EVK. > > [...] > > > +ðernet1 { > > + phy-handle = <&hsgmii_phy1>; > > + phy-mode = "2500base-x"; > > +Andrew could you please take a look at the eth setup? Looks reasonable. Andrew ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine 2026-01-30 20:11 ` Andrew Lunn @ 2026-02-02 10:17 ` Konrad Dybcio 0 siblings, 0 replies; 7+ messages in thread From: Konrad Dybcio @ 2026-02-02 10:17 UTC (permalink / raw) To: Andrew Lunn Cc: Umang Chheda, andersson, konradybcio, robh, krzk+dt, conor+dt, richardcochran, linux-arm-msm, devicetree, linux-kernel, mohd.anwar, krishna.chundru, monish.chunara On 1/30/26 9:11 PM, Andrew Lunn wrote: > On Fri, Jan 30, 2026 at 11:53:09AM +0100, Konrad Dybcio wrote: >> On 1/29/26 6:28 PM, Umang Chheda wrote: >>> The Mezzanine is an hardware expansion add-on board designed >>> to be stacked on top of Lemans EVK. >> >> [...] >> >>> +ðernet1 { >>> + phy-handle = <&hsgmii_phy1>; >>> + phy-mode = "2500base-x"; >> >> +Andrew could you please take a look at the eth setup? > > Looks reasonable. Thanks! Konrad ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-02-02 19:31 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2026-01-29 17:28 [PATCH 0/1] Introduce Lemans EVK Peripheral Mezzanine Umang Chheda 2026-01-29 17:28 ` [PATCH 1/1] arm64: dts: qcom: lemans-evk: Add Mezzanine Umang Chheda 2026-01-30 10:51 ` Konrad Dybcio 2026-02-02 19:31 ` Umang Chheda 2026-01-30 10:53 ` Konrad Dybcio 2026-01-30 20:11 ` Andrew Lunn 2026-02-02 10:17 ` Konrad Dybcio
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