From: Reinette Chatre <reinette.chatre@intel.com>
To: Chen Yu <yu.c.chen@intel.com>, <tony.luck@intel.com>
Cc: <tglx@kernel.org>, <bp@alien8.de>, <mingo@redhat.com>,
<dave.hansen@linux.intel.com>, <hpa@zytor.com>,
<fenghuay@nvidia.com>, <babu.moger@amd.com>,
<hongyu.ning@intel.com>, <chen.yu@linux.dev>, <x86@kernel.org>,
<linux-kernel@vger.kernel.org>,
Hongyu Ning <hongyu.ning@linux.intel.com>
Subject: Re: [PATCH v9 05/12] x86/resctrl: Attach ACPI ERDT information to L3 mon domain on CPU online
Date: Fri, 23 Oct 2026 17:37:04 -0700 [thread overview]
Message-ID: <3e107248-d0aa-4c5d-9c51-d5b73be003e6@intel.com> (raw)
In-Reply-To: <2317c664-0c9b-4dad-b135-a771959be024@intel.com>
On 10/23/26 4:57 PM, Reinette Chatre wrote:
> Hi Chenyu,
>
> On 10/13/26 7:58 PM, Chen Yu wrote:
>> In preparation for MMIO-based LLC occupancy monitoring, link the per-domain
>> ERDT information to the resctrl L3 monitoring domain, so the MMIO read path
>> can locate a domain's MMIO registers.
>
> Please review "Changelog" section of Documentation/process/maintainer-tip.rst
> I understand other subsystems need a snippet that describes the change at the
> top of changelog but x86 does not. Unless it is something really simple, which
> this is not, there has to be some context before the change is described.
>
>>
>> ERDT and CPUID enumerate CPU-to-L3-domain membership independently: CPUID leaf 4
>> describes the L3 cache topology, while the firmware CACD sub-table lists the
>> CPUs of each ERDT domain. Both views must agree on a CPU's L3 domain for that
>> CPU to be monitored safely.
>>
>> When a CPU comes online, validate that firmware and CPUID agree on its L3 domain
>> and bind the CPU to its ERDT domain before adding it to any resctrl domain.
>
> "bind the CPU to its ERDT domain" is this not what patch #3 did?
>
> "adding it" - what does "it" refer to? the ERDT domain or the CPU?
>
>> Fail the CPU online operation on a mismatch for now. Leaving the CPU
>> online but outside all resctrl domains is doable, but it would require a
>> change to cpus_ctrl_write() to reject CPUs that are online but not tracked by
>> any resctrl group. The current approach is stricter, but simpler.
>
> I do not believe failing the CPU online operation is actually possible.
>
> resctrl_arch_late_init() is a late initcall and all boot CPUs are already online,
> so the failure during this time will result in resctrl not being initialized at
> all without impacting online CPUs. A CPU onlined after that will fail to
> initialize, but that will make the CPU unusable for *everything*, not just
> unmonitored. This sounds extreme for an ERDT table issue that should never happen.
>
> A CPU that is online is still able to run tasks and the earlier enumeration
> ensured that MSR_IA32_PQR_ASSOC is accessible and what the valid values for it
> are. Even this "failure" path demonstrates this by calling clear_closid_rmid()
> that writes to MSR_IA32_PQR_ASSOC *after* the supposed failure.
>
> resctrl's current behavior when a CPU cannot be onlined, for example when
> domain creation fails, is to *not* prevent CPU from onlining. If a domain
> cannot be created then the CPU is still added to the default group's
> CPU mask (resctrl_online_cpu()) to ensure that tasks can continue to
> be scheduled on it by writing to MSR_IA32_PQR_ASSOC with values known to
> be valid.
>
> Such a CPU is *not* added to a domain's CPU mask so resctrl will not
> attempt to make any configuration changes to it or read any counters from it.
>
correction: with the CMT event marked as "any_cpu" it may be possible for
the counter to be read from a CPU that was not added to the domain, but this
read will go to MMIO that should succeed? At this point the system will already
be in a state with the logs showing "Firmware Bug" so further attempts at using
resctrl cannot be expected to be ideal. The CPU should continue to be usable
otherwise.
Reinette
next prev parent reply other threads:[~2026-10-24 0:39 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 2:56 [PATCH v9 00/12] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-10-14 2:57 ` [PATCH v9 01/12] x86/topology: Export topo_lookup_cpuid() for resctrl use Chen Yu
2026-10-14 2:58 ` [PATCH v9 02/12] x86/resctrl: Require 64-bit x86 for resctrl support Chen Yu
2026-10-23 23:46 ` Reinette Chatre
2026-10-14 2:58 ` [PATCH v9 03/12] x86/resctrl: Parse ACPI ERDT table and save CACD cpumask per RMD Chen Yu
2026-10-23 23:50 ` Reinette Chatre
2026-10-14 2:58 ` [PATCH v9 04/12] x86/resctrl: Do not enable ERDT when Sub-NUMA Cluster is enabled Chen Yu
2026-10-23 23:54 ` Reinette Chatre
2026-10-14 2:58 ` [PATCH v9 05/12] x86/resctrl: Attach ACPI ERDT information to L3 mon domain on CPU online Chen Yu
2026-10-23 23:57 ` Reinette Chatre
2026-10-24 0:37 ` Reinette Chatre [this message]
2026-10-14 2:59 ` [PATCH v9 06/12] x86,fs/resctrl: Move resctrl_arch_round_mon_val() out of line Chen Yu
2026-10-23 23:59 ` Reinette Chatre
2026-10-14 2:59 ` [PATCH v9 07/12] x86/resctrl: Add a global ERDT monitor scale Chen Yu
2026-10-24 0:02 ` Reinette Chatre
2026-10-14 2:59 ` [PATCH v9 08/12] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-10-14 3:00 ` [PATCH v9 09/12] x86/resctrl: Refactor the monitor read function Chen Yu
2026-10-14 3:00 ` [PATCH v9 10/12] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Chen Yu
2026-10-14 3:00 ` [PATCH v9 11/12] x86/resctrl: Introduce erdt_cpu_has() and erdt_support() Chen Yu
2026-10-14 3:01 ` [PATCH v9 12/12] x86/resctrl: Add MMIO-based LLC occupancy monitoring support Chen Yu
2026-10-24 0:08 ` Reinette Chatre
2026-10-19 12:45 ` [PATCH v9 00/12] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
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