From: "Huang, Kai" <kai.huang@intel.com>
To: "Hansen, Dave" <dave.hansen@intel.com>,
"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>,
"bp@alien8.de" <bp@alien8.de>,
"peterz@infradead.org" <peterz@infradead.org>,
"hpa@zytor.com" <hpa@zytor.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"tglx@linutronix.de" <tglx@linutronix.de>
Cc: "Gao, Chao" <chao.gao@intel.com>,
"seanjc@google.com" <seanjc@google.com>,
"x86@kernel.org" <x86@kernel.org>,
"kas@kernel.org" <kas@kernel.org>,
"sagis@google.com" <sagis@google.com>,
"Chatre, Reinette" <reinette.chatre@intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Williams, Dan J" <dan.j.williams@intel.com>,
"Chen, Farrah" <farrah.chen@intel.com>,
"ashish.kalra@amd.com" <ashish.kalra@amd.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"Yamahata, Isaku" <isaku.yamahata@intel.com>,
"nik.borisov@suse.com" <nik.borisov@suse.com>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"dwmw@amazon.co.uk" <dwmw@amazon.co.uk>
Subject: Re: [PATCH v5 3/7] x86/virt/tdx: Mark memory cache state incoherent when making SEAMCALL
Date: Tue, 12 Aug 2025 02:03:18 +0000 [thread overview]
Message-ID: <46bd50822596f6bf0795e96daeaef01415746e08.camel@intel.com> (raw)
In-Reply-To: <e11de78443cea475030635b4d440803db3e0cf8c.camel@intel.com>
On Tue, 2025-08-12 at 01:34 +0000, Edgecombe, Rick P wrote:
> On Tue, 2025-08-12 at 01:32 +0000, Huang, Kai wrote:
> > > sc_retry() is the only one with a hint of what is different about it, but it
> > > randomly uses sc abbreviation instead of seamcall. That is an existing
> > > thing.
> > > But the additional one should be named with something about the cache part
> > > that
> > > it does, like seamcall_dirty_cache() or something. "do_seamcall()" tells the
> > > reader nothing.
> >
> > OK. I'll change do_seamcall() to seamcall_dirty_cache().
> >
> > Is there anything else I can improve? Otherwise I plan to send out v6
> > soon.
>
> I do think we should look at improving the stack of seamcall helpers.
>
Agreed.
> But
> otherwise, please add:
>
> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com> with the name change.
Thanks.
next prev parent reply other threads:[~2025-08-12 2:03 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-28 12:28 [PATCH v5 0/7] TDX host: kexec/kdump support Kai Huang
2025-07-28 12:28 ` [PATCH v5 1/7] x86/kexec: Consolidate relocate_kernel() function parameters Kai Huang
2025-08-06 6:53 ` Huang, Kai
2025-08-06 13:00 ` Tom Lendacky
2025-08-06 22:29 ` Huang, Kai
2025-07-28 12:28 ` [PATCH v5 2/7] x86/sme: Use percpu boolean to control WBINVD during kexec Kai Huang
2025-07-28 12:28 ` [PATCH v5 3/7] x86/virt/tdx: Mark memory cache state incoherent when making SEAMCALL Kai Huang
2025-08-01 8:23 ` Chao Gao
2025-08-04 12:47 ` Huang, Kai
2025-08-12 0:51 ` Edgecombe, Rick P
2025-08-12 1:32 ` Huang, Kai
2025-08-12 1:34 ` Edgecombe, Rick P
2025-08-12 2:03 ` Huang, Kai [this message]
2025-08-14 0:09 ` Huang, Kai
2025-07-28 12:28 ` [PATCH v5 4/7] x86/kexec: Disable kexec/kdump on platforms with TDX partial write erratum Kai Huang
2025-07-28 12:28 ` [PATCH v5 5/7] x86/virt/tdx: Remove the !KEXEC_CORE dependency Kai Huang
2025-07-28 12:28 ` [PATCH v5 6/7] x86/virt/tdx: Update the kexec section in the TDX documentation Kai Huang
2025-07-28 12:28 ` [PATCH v5 7/7] KVM: TDX: Explicitly do WBINVD when no more TDX SEAMCALLs Kai Huang
2025-08-01 8:30 ` Chao Gao
2025-08-04 12:48 ` Huang, Kai
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