From: Jie Luo <quic_luoj@quicinc.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: <hkallweit1@gmail.com>, <davem@davemloft.net>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<linux@armlinux.org.uk>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] net: phy: at803x: support qca8081 1G chip type
Date: Sat, 1 Jul 2023 23:42:55 +0800 [thread overview]
Message-ID: <48ad596c-07ee-9721-7ae5-c524d8f4d3e7@quicinc.com> (raw)
In-Reply-To: <3e0477e6-f96e-4842-a0c2-b2cb744ee83a@lunn.ch>
On 7/1/2023 10:30 PM, Andrew Lunn wrote:
>> There are MMD device 1, 3, 7 in qca8081 PHY, the PMA abilities
>> 10/100/1000/2500 are compliant with genphy_c45_pma_read_abilities, but the
>> MDIO_AN_STAT1_ABLE does not exist in MMD7.1 register.
>>
>> so the genphy_c45_pma_read_abilities can't be fully supported by qca8081
>> phy, sorry for this misunderstanding.
>
> If all you are missing is MDIO_AN_STAT1_ABLE, then i assume you are
> missing Autoneg? So have your tried using
> genphy_c45_pma_read_abilities() and then just doing:
>
> linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
> phydev->supported);
>
> with a comment explaining why.
>
> Andrew
Thanks Andrew for this suggestion, i will verify this code and update
the patch series.
next prev parent reply other threads:[~2023-07-01 15:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-29 3:48 [PATCH 0/3] net: phy: at803x: support qca8081 1G version chip Luo Jie
2023-06-29 3:48 ` [PATCH 1/3] net: phy: at803x: support qca8081 1G chip type Luo Jie
2023-06-29 13:14 ` Andrew Lunn
2023-06-30 6:39 ` Jie Luo
2023-06-30 13:16 ` Andrew Lunn
2023-07-01 8:00 ` Jie Luo
2023-07-01 14:30 ` Andrew Lunn
2023-07-01 15:42 ` Jie Luo [this message]
2023-06-29 3:48 ` [PATCH 2/3] net: phy: at803x: remove 1000BaseX mode of qca8081 Luo Jie
2023-06-29 13:16 ` Andrew Lunn
2023-06-29 3:48 ` [PATCH 3/3] net: phy: at803x: add qca8081 fifo reset on the link down Luo Jie
2023-06-29 13:23 ` Andrew Lunn
2023-06-30 6:54 ` Jie Luo
2023-06-30 13:21 ` Andrew Lunn
2023-07-01 8:04 ` Jie Luo
2023-07-01 14:34 ` Andrew Lunn
2023-07-01 15:44 ` Jie Luo
2023-07-01 16:21 ` Andrew Lunn
2023-07-02 10:00 ` Jie Luo
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