From: Hans Zhang <hans.zhang@cixtech.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
mani@kernel.org, robh@kernel.org, kwilczynski@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, mpillai@cadence.com,
fugang.duan@cixtech.com, guoyin.chen@cixtech.com,
peter.chen@cixtech.com, cix-kernel-upstream@cixtech.com,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 10/14] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings
Date: Tue, 15 Jul 2025 14:46:46 +0800 [thread overview]
Message-ID: <4b902e2e-9cbc-4c3c-8318-fb7d6e86545e@cixtech.com> (raw)
In-Reply-To: <eddf1e77-10b5-424c-b082-846bd2646f42@kernel.org>
On 2025/7/15 14:40, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL
>
> On 14/07/2025 10:03, Hans Zhang wrote:
>>
>>
>> On 2025/7/14 15:43, Krzysztof Kozlowski wrote:
>>> EXTERNAL EMAIL
>>>
>>> On 03/07/2025 03:47, Hans Zhang wrote:
>>>>>>
>>>>>> We initially used the logic of Cadence common driver as follows:
>>>>>> drivers/pci/controller/cadence/pcie-cadence-host.c
>>>>>> of_property_read_u32(np, "vendor-id", &rc->vendor_id);
>>>>>>
>>>>>> of_property_read_u32(np, "device-id", &rc->device_id);
>>>>>>
>>>>>> So, can the code in Cadence be deleted?
>>>>>
>>>>> Don't know. If this is ABI, then not.
>>>>>
>>>>
>>>> According to my understanding, this is not ABI.
>>>
>>> Huh? Then what is ABI, by your understanding?
>>>
>>
>> Dear Krzysztof,
>>
>> I understand kernel ABI primarily refers to the stable binary contract
>> between the kernel and userspace (e.g., syscalls, /sys/proc interfaces).
>> Device tree properties are part of the boot-time hardware description
>> consumed by drivers during initialization. They are not directly exposed
>> to userspace as ABI interfaces.
>>
>> If I understand wrongly, please correct me.
>
>
> Then that's wrong understanding.
>
> The DT interface, documented explicitly and one implied by kernel
> drivers in case it differs, is the ABI, as explained in docs in the
> kernel and what we said on the lists thousands of times.
>
Dear Krzysztof,
Thank you very much for your reply and explanation. Now I understand
that I have been discussing issues in the linux community for about half
a year. I didn't pay attention to it before. Thank you again.
Best regards,
Hans
next prev parent reply other threads:[~2025-07-15 6:46 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-30 4:15 [PATCH v5 00/14] Enhance the PCIe controller driver hans.zhang
2025-06-30 4:15 ` [PATCH v5 01/14] dt-bindings: pci: cadence: Extend compatible for new RP configuration hans.zhang
2025-06-30 7:30 ` Krzysztof Kozlowski
2025-06-30 8:02 ` Hans Zhang
2025-06-30 8:06 ` Manikandan Karunakaran Pillai
2025-06-30 11:11 ` Krzysztof Kozlowski
2025-07-01 11:56 ` Manikandan Karunakaran Pillai
2025-07-02 20:20 ` Krzysztof Kozlowski
2025-07-03 1:35 ` Manikandan Karunakaran Pillai
2025-07-03 6:55 ` Krzysztof Kozlowski
2025-06-30 4:15 ` [PATCH v5 02/14] dt-bindings: pci: cadence: Extend compatible for new EP configuration hans.zhang
2025-06-30 7:27 ` Krzysztof Kozlowski
2025-06-30 8:03 ` Hans Zhang
2025-06-30 10:28 ` Krzysztof Kozlowski
2025-06-30 4:15 ` [PATCH v5 03/14] PCI: cadence: Split PCIe controller header file hans.zhang
2025-06-30 4:15 ` [PATCH v5 04/14] PCI: cadence: Add register definitions for HPA(High Perf Architecture) hans.zhang
2025-06-30 4:15 ` [PATCH v5 05/14] PCI: cadence: Split PCIe EP support into common and specific functions hans.zhang
2025-06-30 4:15 ` [PATCH v5 06/14] PCI: cadence: Split PCIe RP " hans.zhang
2025-06-30 4:15 ` [PATCH v5 07/14] PCI: cadence: Split the common functions for PCIE controller support hans.zhang
2025-06-30 4:15 ` [PATCH v5 08/14] PCI: cadence: Add support for High Performance Arch(HPA) controller hans.zhang
2025-06-30 4:15 ` [PATCH v5 09/14] PCI: cadence: Add support for PCIe HPA controller platform hans.zhang
2025-06-30 4:15 ` [PATCH v5 10/14] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-06-30 5:36 ` Rob Herring (Arm)
2025-06-30 5:56 ` Hans Zhang
2025-06-30 7:26 ` Krzysztof Kozlowski
2025-06-30 8:29 ` Hans Zhang
2025-06-30 11:14 ` Krzysztof Kozlowski
2025-06-30 15:30 ` Hans Zhang
2025-07-02 20:23 ` Krzysztof Kozlowski
2025-07-03 1:47 ` Hans Zhang
2025-07-14 7:43 ` Krzysztof Kozlowski
2025-07-14 8:03 ` Hans Zhang
2025-07-15 6:40 ` Krzysztof Kozlowski
2025-07-15 6:46 ` Hans Zhang [this message]
2025-06-30 15:54 ` Hans Zhang
2025-07-02 20:28 ` Krzysztof Kozlowski
2025-06-30 4:15 ` [PATCH v5 11/14] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-06-30 4:15 ` [PATCH v5 12/14] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-06-30 7:29 ` Krzysztof Kozlowski
2025-06-30 8:06 ` Hans Zhang
2025-06-30 4:16 ` [PATCH v5 13/14] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-06-30 7:33 ` Krzysztof Kozlowski
2025-06-30 8:44 ` Hans Zhang
2025-06-30 4:16 ` [PATCH v5 14/14] arm64: dts: cix: Enable PCIe on the Orion O6 board hans.zhang
2025-06-30 7:32 ` Krzysztof Kozlowski
2025-06-30 8:08 ` Hans Zhang
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