mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Andrew Lunn <andrew@lunn.ch>
To: Dong Yibo <dong100@mucse.com>
Cc: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, pabeni@redhat.com, horms@kernel.org,
	corbet@lwn.net, gur.stavi@huawei.com, maddy@linux.ibm.com,
	mpe@ellerman.id.au, danishanwar@ti.com, lee@trager.us,
	gongfan1@huawei.com, lorenzo@kernel.org, geert+renesas@glider.be,
	Parthiban.Veerasooran@microchip.com, lukas.bulwahn@redhat.com,
	alexanderduyck@fb.com, richardcochran@gmail.com,
	netdev@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 02/15] net: rnpgbe: Add n500/n210 chip support
Date: Mon, 21 Jul 2025 17:25:12 +0200	[thread overview]
Message-ID: <4dea5acc-dd7d-463c-b099-53713dd3d7ee@lunn.ch> (raw)
In-Reply-To: <20250721113238.18615-3-dong100@mucse.com>

> +struct mii_regs {
> +	unsigned int addr; /* MII Address */
> +	unsigned int data; /* MII Data */
> +	unsigned int addr_shift; /* MII address shift */
> +	unsigned int reg_shift; /* MII reg shift */
> +	unsigned int addr_mask; /* MII address mask */
> +	unsigned int reg_mask; /* MII reg mask */
> +	unsigned int clk_csr_shift;
> +	unsigned int clk_csr_mask;
> +};

So MII interests me, being the MDIO/PHY maintainer....

You have introduced this without any user, which is not good, so i
cannot see how it is actually used. It is better to introduce
structures in the patch which makes use of them.

Please add this only when you add the mdiobus driver, so i can see how
it is used. Please look at the other structures you have here. Please
add them as they are actually used.

> +struct mucse_hw {
> +	void *back;
> +	u8 pfvfnum;
> +	u8 pfvfnum_system;
> +	u8 __iomem *hw_addr;
> +	u8 __iomem *ring_msix_base;

I spotted this somewhere else. A u8 __iomem * is odd. Why is this not
a void *? ioremap() returns a void __iomem *, and all the readb(),
readw(), readX() functions expect a void * __iomem. So this looks odd.

> +#define m_rd_reg(reg) readl(reg)
> +#define m_wr_reg(reg, val) writel((val), reg)

Please don't wrap standard functions like this. Everybody knows what
readl() does. Nobody has any idea what m_rd_reg() does! You are just
making your driver harder to understand and maintain.

> +	mac->mii.addr = RNPGBE_MII_ADDR;
> +	mac->mii.data = RNPGBE_MII_DATA;
> +	mac->mii.addr_shift = 11;
> +	mac->mii.addr_mask = 0x0000F800;

GENMASK()? If you are using these helpers correctly, you probably
don't need the _shift members.

> +	mac->mii.reg_shift = 6;
> +	mac->mii.reg_mask = 0x000007C0;
> +	mac->mii.clk_csr_shift = 2;
> +	mac->mii.clk_csr_mask = GENMASK(5, 2);
> +	mac->clk_csr = 0x02; /* csr 25M */
> +	/* hw fixed phy_addr */
> +	mac->phy_addr = 0x11;

That is suspicious. But until i see the PHY handling code, it is hard
to say.

> +static void rnpgbe_get_invariants_n210(struct mucse_hw *hw)
> +{
> +	struct mucse_mbx_info *mbx = &hw->mbx;
> +	/* get invariants based from n500 */
> +	rnpgbe_get_invariants_n500(hw);
> +
> +	/* update msix base */
> +	hw->ring_msix_base = hw->hw_addr + 0x29000;
> +	/* update mbx offset */
> +	mbx->vf2pf_mbox_vec_base = 0x29200;
> +	mbx->fw2pf_mbox_vec = 0x29400;
> +	mbx->pf_vf_shm_base = 0x29900;
> +	mbx->mbx_mem_size = 64;
> +	mbx->pf2vf_mbox_ctrl_base = 0x2aa00;
> +	mbx->pf_vf_mbox_mask_lo = 0x2ab00;
> +	mbx->pf_vf_mbox_mask_hi = 0;
> +	mbx->fw_pf_shm_base = 0x2d900;
> +	mbx->pf2fw_mbox_ctrl = 0x2e900;
> +	mbx->fw_pf_mbox_mask = 0x2eb00;
> +	mbx->fw_vf_share_ram = 0x2b900;
> +	mbx->share_size = 512;
> +	/* update hw feature */
> +	hw->feature_flags |= M_HW_FEATURE_EEE;
> +	hw->usecstocount = 62;

This variant does not have an MDIO bus?

> +#define RNPGBE_RING_BASE (0x1000)
> +#define RNPGBE_MAC_BASE (0x20000)
> +#define RNPGBE_ETH_BASE (0x10000)

Please drop all the () on plain constants. You only need () when it is
an expression.

> +			      const struct rnpgbe_info *ii)

I don't really see how the variable name ii has anything to do with
rnpgbe_info. I know naming is hard, but why not call it info?


>  {
>  	struct mucse *mucse = NULL;
> +	struct mucse_hw *hw = NULL;
> +	u8 __iomem *hw_addr = NULL;
>  	struct net_device *netdev;
>  	static int bd_number;
> +	u32 dma_version = 0;
> +	int err = 0;
> +	u32 queues;
>  
> -	netdev = alloc_etherdev_mq(sizeof(struct mucse), 1);
> +	queues = ii->total_queue_pair_cnts;
> +	netdev = alloc_etherdev_mq(sizeof(struct mucse), queues);

I pointed out this before. Try to avoid changing code added in
previous patches. I just wasted time looking up what the function is
called which allocates a single queue, and writing a review comment.

Waiting reviewers time is a good way to get less/slower reviews.

	Andrew

  parent reply	other threads:[~2025-07-21 15:25 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-21 11:32 [PATCH v2 00/15] Add driver for 1Gbe network chips from MUCSE Dong Yibo
2025-07-21 11:32 ` [PATCH v2 01/15] net: rnpgbe: Add build support for rnpgbe Dong Yibo
2025-07-21 13:30   ` Vadim Fedorenko
2025-07-21 14:57     ` Andrew Lunn
2025-07-22  3:02     ` Yibo Dong
2025-07-22 10:17       ` Vadim Fedorenko
2025-07-22 11:05         ` Yibo Dong
2025-07-21 14:55   ` Andrew Lunn
2025-07-22  3:38     ` Yibo Dong
2025-07-22 14:58       ` Andrew Lunn
2025-07-21 21:23   ` Brett Creeley
2025-07-22  4:59     ` Yibo Dong
2025-07-22 11:29   ` Simon Horman
2025-07-23  3:01     ` Yibo Dong
2025-07-23 20:09       ` Simon Horman
2025-07-24  6:10         ` Yibo Dong
2025-07-25  9:51           ` Simon Horman
2025-07-21 11:32 ` [PATCH v2 02/15] net: rnpgbe: Add n500/n210 chip support Dong Yibo
2025-07-21 14:21   ` Vadim Fedorenko
2025-07-22  9:51     ` Yibo Dong
2025-07-22 10:26       ` Vadim Fedorenko
2025-07-22 11:09         ` Yibo Dong
2025-07-21 15:25   ` Andrew Lunn [this message]
2025-07-22  6:21     ` Yibo Dong
2025-07-22 13:56       ` Andrew Lunn
2025-07-21 11:32 ` [PATCH v2 03/15] net: rnpgbe: Add basic mbx ops support Dong Yibo
2025-07-21 14:40   ` Vadim Fedorenko
2025-07-21 15:43   ` Andrew Lunn
2025-07-22  6:45     ` Yibo Dong
2025-07-22 13:50       ` Andrew Lunn
2025-07-23 10:27         ` Yibo Dong
2025-07-21 21:54   ` Brett Creeley
2025-07-22  7:39     ` Yibo Dong
2025-07-22 11:35   ` Simon Horman
2025-07-23  3:07     ` Yibo Dong
2025-07-23 14:38       ` Andrew Lunn
2025-07-25 10:11         ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 04/15] net: rnpgbe: Add get_capability mbx_fw " Dong Yibo
2025-07-21 22:08   ` Brett Creeley
2025-07-22  8:04     ` Yibo Dong
2025-07-22 13:19   ` Simon Horman
2025-07-23  3:15     ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 05/15] net: rnpgbe: Add download firmware for n210 chip Dong Yibo
2025-07-21 11:32 ` [PATCH v2 06/15] net: rnpgbe: Add some functions for hw->ops Dong Yibo
2025-07-21 11:32 ` [PATCH v2 07/15] net: rnpgbe: Add get mac from hw Dong Yibo
2025-07-21 11:32 ` [PATCH v2 08/15] net: rnpgbe: Add irq support Dong Yibo
2025-07-22 13:25   ` Simon Horman
2025-07-23  3:21     ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 09/15] net: rnpgbe: Add netdev register and init tx/rx memory Dong Yibo
2025-07-21 11:32 ` [PATCH v2 10/15] net: rnpgbe: Add netdev irq in open Dong Yibo
2025-07-22 14:03   ` Simon Horman
2025-07-23  6:13     ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 11/15] net: rnpgbe: Add setup hw ring-vector, true up/down hw Dong Yibo
2025-07-21 11:32 ` [PATCH v2 12/15] net: rnpgbe: Add link up handler Dong Yibo
2025-07-21 15:47   ` Andrew Lunn
2025-07-22  6:48     ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 13/15] net: rnpgbe: Add base tx functions Dong Yibo
2025-07-21 11:32 ` [PATCH v2 14/15] net: rnpgbe: Add base rx function Dong Yibo
2025-07-22 14:14   ` Simon Horman
2025-07-23  6:49     ` Yibo Dong
2025-07-21 11:32 ` [PATCH v2 15/15] net: rnpgbe: Add ITR for rx Dong Yibo
2025-07-22 11:20 ` [PATCH v2 00/15] Add driver for 1Gbe network chips from MUCSE MD Danish Anwar
2025-07-22 11:35   ` Yibo Dong
2025-07-22 15:07     ` Andrew Lunn
2025-07-23 10:42       ` Yibo Dong

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4dea5acc-dd7d-463c-b099-53713dd3d7ee@lunn.ch \
    --to=andrew@lunn.ch \
    --cc=Parthiban.Veerasooran@microchip.com \
    --cc=alexanderduyck@fb.com \
    --cc=andrew+netdev@lunn.ch \
    --cc=corbet@lwn.net \
    --cc=danishanwar@ti.com \
    --cc=davem@davemloft.net \
    --cc=dong100@mucse.com \
    --cc=edumazet@google.com \
    --cc=geert+renesas@glider.be \
    --cc=gongfan1@huawei.com \
    --cc=gur.stavi@huawei.com \
    --cc=horms@kernel.org \
    --cc=kuba@kernel.org \
    --cc=lee@trager.us \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lorenzo@kernel.org \
    --cc=lukas.bulwahn@redhat.com \
    --cc=maddy@linux.ibm.com \
    --cc=mpe@ellerman.id.au \
    --cc=netdev@vger.kernel.org \
    --cc=pabeni@redhat.com \
    --cc=richardcochran@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®