From: Michal Simek <michal.simek@amd.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
"Praveen Teja Kundanala" <praveen.teja.kundanala@amd.com>,
<srinivas.kandagatla@linaro.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/5] dt-bindings: nvmem: Convert xlnx,zynqmp-nvmem.txt to yaml
Date: Fri, 13 Oct 2023 14:08:42 +0200 [thread overview]
Message-ID: <5a3b6efe-5884-4727-a1e1-e9b8b0658523@amd.com> (raw)
In-Reply-To: <b5a2d37b-168c-4cc9-9dc0-68f131cdf3ad@linaro.org>
On 10/13/23 13:58, Krzysztof Kozlowski wrote:
> On 13/10/2023 13:51, Michal Simek wrote:
>>
>>
>> On 10/13/23 13:46, Krzysztof Kozlowski wrote:
>>> On 13/10/2023 13:22, Michal Simek wrote:
>>>>>
>>>>>> +
>>>>>> +required:
>>>>>> + - compatible
>>>>>
>>>>> required: block goes after patternProperties: block
>>>>>
>>>>>> +
>>>>>> +patternProperties:
>>>>>> + "^soc_revision@0$":
>>>>>
>>>>> Why do you define individual memory cells? Is this part of a binding?
>>>>> IOW, OS/Linux requires this?
>>>>
>>>> nvmem has in kernel interface where you can reference to nodes. nvmem_cell_get()
>>>> calls. It means you should be able to describe internal layout that's why names
>>>> are used. And address in name is there because of reg property is used to
>>>> describe base offset and size.
>>>
>>> That's not really what I am asking. Why internal layout of memory must
>>> be part of the bindings?
>>
>> It doesn't need to be but offsets are hardcoded inside the driver itself and
>> they can't be different.
>
> Hm, where? I opened drivers/nvmem/zynqmp_nvmem.c and I do not see any
> hard-coded offsets.
Current driver supports only soc revision from offset 0.
But if you look at 5/5 you need to define offsets where information is present.
+#define SOC_VERSION_OFFSET 0x0
+#define EFUSE_START_OFFSET 0xC
+#define EFUSE_END_OFFSET 0xFC
+#define EFUSE_PUF_START_OFFSET 0x100
+#define EFUSE_PUF_MID_OFFSET 0x140
+#define EFUSE_PUF_END_OFFSET 0x17F
>
>> On different nvmem locations like MAC location in
>> eeprom this can vary across boards but in this case location has to be only like
>> this.
>> I am fine if they don't need to be actually check but there is no any other way
>> how they can be composed. And also others are not valid that's why not to
>> describe only valid one.
>
> OK, that would be valid (if I find anywhere the offsets) and answers my
> questions but I wish it was documented somewhere. Because now you are
> making it a binding, so it cannot change (e.g. for different devices
> with same hardware but different firmware or manufacturing process, for
> future hardware sharing this binding).
ZynqMP firmware with xlnx,zynqmp-nvmem-fw compatible string is using this map.
If there is different firmware likely xlnx,zynqmp-nvmem-fw compatible string
can't be used.
> In any case the binding should have only items which are really fixed
> and OS depends on them. Neither this nor next commit answers this.
Actually 5/5 has this in commit message
0 - SOC version(read only)
0xC - 0xFC -ZynqMP specific purpose efuses
0x100 - 0x17F - Physical Unclonable Function(PUF)
efuses repurposed as user efuses
Thanks,
Michal
next prev parent reply other threads:[~2023-10-13 12:09 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-13 10:14 [PATCH 0/5] Add ZynqMP efuse access support Praveen Teja Kundanala
2023-10-13 10:14 ` [PATCH 1/5] firmware: xilinx: Add ZynqMP efuse access API Praveen Teja Kundanala
2023-10-13 10:14 ` [PATCH 2/5] dt-bindings: nvmem: Convert xlnx,zynqmp-nvmem.txt to yaml Praveen Teja Kundanala
2023-10-13 10:30 ` Krzysztof Kozlowski
2023-10-13 11:22 ` Michal Simek
2023-10-13 11:46 ` Krzysztof Kozlowski
2023-10-13 11:51 ` Michal Simek
2023-10-13 11:58 ` Krzysztof Kozlowski
2023-10-13 12:08 ` Michal Simek [this message]
2023-10-13 12:54 ` Krzysztof Kozlowski
2023-10-13 13:06 ` Michal Simek
2023-10-13 13:10 ` Krzysztof Kozlowski
2023-10-13 13:12 ` Michal Simek
2023-10-16 8:01 ` Michal Simek
2023-10-16 10:06 ` Kundanala, Praveen Teja
2023-10-13 11:09 ` Rob Herring
2023-10-13 16:23 ` Rob Herring
2023-10-13 10:14 ` [PATCH 3/5] dt-bindings: nvmem: Add nodes for ZynqMP efuses Praveen Teja Kundanala
2023-10-13 10:31 ` Krzysztof Kozlowski
2023-10-13 10:14 ` [PATCH 4/5] arm64: zynqmp: Add ZynqnMP nvmem nodes Praveen Teja Kundanala
2023-10-13 10:32 ` Krzysztof Kozlowski
2023-10-13 11:18 ` Michal Simek
2023-10-13 10:14 ` [PATCH 5/5] nvmem: zynqmp_nvmem: Add support to access efuse Praveen Teja Kundanala
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