From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@amd.com>
To: Vasant Hegde <vasant.hegde@amd.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, jgg@nvidia.com
Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com,
jon.grimm@amd.com, santosh.shukla@amd.com, Sairaj.K@amd.com,
jay.chen@amd.com, wvw@google.com, wnliu@google.com,
dantuluris@google.com, chriscli@google.com, kpsingh@google.com,
alejandro.j.jimenez@oracle.com, joao.m.martins@oracle.com
Subject: Re: [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event
Date: Tue, 1 Sep 2026 15:28:26 +0700 [thread overview]
Message-ID: <6dc11f18-d03e-4e53-9f46-60882ee4b2d4@amd.com> (raw)
In-Reply-To: <1f2011b3-350c-46dc-a21b-69baaf059af7@amd.com>
On 8/10/2026 2:12 PM, Vasant Hegde wrote:
> Hi Suravee,
>
>
> On 7/27/2026 6:58 PM, Suravee Suthikulpanit wrote:
>> Adding support for new vIOMMU events:
>> * Guest Event Fault event
>> * vIOMMU Hardware Error event
>>
>> Also, adding support for the additional vIOMMU related flags
>> in existing events.
>>
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>> ---
>> drivers/iommu/amd/amd_iommu_types.h | 7 ++++
>> drivers/iommu/amd/iommu.c | 58 ++++++++++++++++++++++-------
>> 2 files changed, 52 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
>> index d2c64e2e9f05..4df6a50128de 100644
>> --- a/drivers/iommu/amd/amd_iommu_types.h
>> +++ b/drivers/iommu/amd/amd_iommu_types.h
>> @@ -149,6 +149,9 @@
>> #define EVENT_TYPE_IOTLB_INV_TO 0x7
>> #define EVENT_TYPE_INV_DEV_REQ 0x8
>> #define EVENT_TYPE_INV_PPR_REQ 0x9
>> +#define EVENT_TYPE_GUEST_EVENT_FAULT 0xb
>
> Better `EVENT_TYPE_GUEST_FAULT` ?
I want to keep this consistent with the IOMMU spec "GUEST_EVENT_FAULT"
event.
>
>> +#define EVENT_TYPE_VIOMMU_HW_ERR 0xc
>> +
>> #define EVENT_TYPE_RMP_FAULT 0xd
>> #define EVENT_TYPE_RMP_HW_ERR 0xe
>> #define EVENT_DEVID_MASK 0xffff
>> @@ -261,6 +264,10 @@
>> #define EVTLOG_SIZE_MAX SZ_512K /* 32K entries */
>> #define EVTLOG_LEN_MASK_MAX (0xFULL << EVTLOG_SIZE_SHIFT)
>>
>> +/* Constants for IO_PAGE_FAULT event */
>> +#define IO_PAGE_FAULT_VFLAGS_SHIFT 27
>> +#define IO_PAGE_FAULT_VFLAGS_MASK GENMASK_ULL(27, 23)
>
> You mean (31, 27) ?
I'll fix the mask and remove the shift since it's no longer needed.
>
>> +
>> /* Constants for PPR Log handling */
>> #define PPRLOG_ENTRY_SIZE 0x10
>> #define PPRLOG_SIZE_SHIFT 56
>> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
>> index 4b4dd20ebec6..50f26c8123f3 100644
>> --- a/drivers/iommu/amd/iommu.c
>> +++ b/drivers/iommu/amd/iommu.c
>> @@ -854,7 +854,7 @@ static void amd_iommu_report_rmp_fault(struct amd_iommu *iommu, volatile u32 *ev
>>
>> static void amd_iommu_report_page_fault(struct amd_iommu *iommu,
>> u16 devid, u16 domain_id,
>> - u64 address, int flags)
>> + u64 address, int flags, u8 vflags)
>> {
>> struct iommu_dev_data *dev_data = NULL;
>> struct pci_dev *pdev;
>> @@ -889,13 +889,13 @@ static void amd_iommu_report_page_fault(struct amd_iommu *iommu,
>> }
>>
>> if (__ratelimit(&dev_data->rs)) {
>> - pci_err(pdev, "Event logged [IO_PAGE_FAULT domain=0x%04x address=0x%llx flags=0x%04x]\n",
>> - domain_id, address, flags);
>> + pci_err(pdev, "Event logged [IO_PAGE_FAULT domain=0x%04x address=0x%llx flags=0x%04x vflags=%#x]\n",
>> + domain_id, address, flags, vflags);
>> }
>> } else {
>> - pr_err_ratelimited("Event logged [IO_PAGE_FAULT device=%04x:%02x:%02x.%x domain=0x%04x address=0x%llx flags=0x%04x]\n",
>> + pr_err_ratelimited("Event logged [IO_PAGE_FAULT device=%04x:%02x:%02x.%x domain=0x%04x address=0x%llx flags=0x%04x vflags=%#x]\n",
>> iommu->pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
>> - domain_id, address, flags);
>> + domain_id, address, flags, vflags);
>> }
>>
>> out:
>> @@ -932,29 +932,42 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
>> }
>>
>> if (type == EVENT_TYPE_IO_FAULT) {
>> - amd_iommu_report_page_fault(iommu, devid, pasid, address, flags);
>> + u8 vflags = FIELD_GET(IO_PAGE_FAULT_VFLAGS_MASK, event[0]);
>
> Move this assignment to up where we extract all other fields from event so that
> we don't need to repeat multiple times?
Since the vflags is only available in certain commands only. I'd rather
keep them separate for better code readability.
>> +
>> + amd_iommu_report_page_fault(iommu, devid, pasid, address, flags, vflags);
>> return;
>> }
>>
>> switch (type) {
>> case EVENT_TYPE_ILL_DEV:
>> - dev_err(dev, "Event logged [ILLEGAL_DEV_TABLE_ENTRY device=%04x:%02x:%02x.%x pasid=0x%05x address=0x%llx flags=0x%04x]\n",
>> + {
>> + u8 vflags = FIELD_GET(IO_PAGE_FAULT_VFLAGS_MASK, event[0]);
>> +
>> + dev_err(dev, "Event logged [ILLEGAL_DEV_TABLE_ENTRY deice=%04x:%02x:%02x.%x pasid=0x%05x address=0x%llx flags=0x%04x vflags=%#x]\n",
>> iommu->pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
>> - pasid, address, flags);
>> + pasid, address, flags, vflags);
>> dev_err(dev, "Control Reg : 0x%llx\n", ctrl);
>> dump_dte_entry(iommu, devid);
>> break;
>> + }
>> case EVENT_TYPE_DEV_TAB_ERR:
>> - dev_err(dev, "Event logged [DEV_TAB_HARDWARE_ERROR device=%04x:%02x:%02x.%x "
>> - "address=0x%llx flags=0x%04x]\n",
>> + {
>> + u8 vflags = FIELD_GET(IO_PAGE_FAULT_VFLAGS_MASK, event[0]);
>> +
>> + dev_err(dev, "Event logged [DEV_TAB_HARDWARE_ERROR device=%04x:%02x:%02x.%x address=%#llx flags=%#04x vlfags=%#x]\n",
>> iommu->pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
>> - address, flags);
>> + address, flags, vflags);
>> break;
>> + }
>> case EVENT_TYPE_PAGE_TAB_ERR:
>> - dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%04x:%02x:%02x.%x pasid=0x%04x address=0x%llx flags=0x%04x]\n",
>> + {
>> + u8 vflags = FIELD_GET(IO_PAGE_FAULT_VFLAGS_MASK, event[0]);
>> +
>> + dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%04x:%02x:%02x.%x pasid=0x%04x address=0x%llx flags=0x%04x vflags=%#x]\n",
>> iommu->pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
>> - pasid, address, flags);
>> + pasid, address, flags, vflags);
>> break;
>> + }
>> case EVENT_TYPE_ILL_CMD:
>> dev_err(dev, "Event logged [ILLEGAL_COMMAND_ERROR address=0x%llx]\n", address);
>> dump_command(address);
>> @@ -986,6 +999,25 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
>> iommu->pci_seg->id, PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid),
>> pasid, address, flags, tag);
>> break;
>> + case EVENT_TYPE_GUEST_EVENT_FAULT:
>> + {
>> + u8 gid = event[1] & 0xFFFF;
>
> As discussed offline, s/u8/u16/. Also may be add a macro to get the gid from event?
Note. Fixed in v5.
Thanks
> -Vasant
next prev parent reply other threads:[~2026-09-01 8:28 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 13:28 [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 01/24] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-08-05 17:01 ` Vasant Hegde
2026-09-01 7:56 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-08-10 7:12 ` Vasant Hegde
2026-09-01 8:28 ` Suthikulpanit, Suravee [this message]
2026-08-19 8:17 ` guanghuifeng
2026-09-01 14:21 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-08-10 8:13 ` Vasant Hegde
2026-09-01 16:32 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-08-10 9:21 ` Vasant Hegde
2026-09-02 7:49 ` Suthikulpanit, Suravee
2026-08-24 17:24 ` Jason Gunthorpe
2026-09-02 7:50 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-08-10 10:00 ` Vasant Hegde
2026-09-02 12:16 ` Suthikulpanit, Suravee
2026-08-19 13:18 ` guanghuifeng
2026-09-02 12:16 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-08-10 10:49 ` Vasant Hegde
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-08-19 8:34 ` guanghuifeng
2026-09-02 22:33 ` Suthikulpanit, Suravee
2026-07-27 13:28 ` [PATCH 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:28 ` [PATCH 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-08-10 11:07 ` Vasant Hegde
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 11/24] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 12/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-08-19 13:30 ` guanghuifeng
2026-09-03 0:41 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 16/24] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-08-19 13:34 ` guanghuifeng
2026-09-03 2:41 ` Suthikulpanit, Suravee
2026-08-24 17:24 ` Jason Gunthorpe
2026-07-27 13:29 ` [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-08-19 10:45 ` guanghuifeng
2026-09-03 3:26 ` Suthikulpanit, Suravee
2026-07-27 13:29 ` [PATCH 18/24] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-08-10 15:17 ` Vasant Hegde
2026-09-03 3:19 ` Suthikulpanit, Suravee
2026-08-19 10:26 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-08-19 10:18 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
2026-08-19 9:42 ` guanghuifeng
2026-09-03 3:56 ` Suthikulpanit, Suravee
2026-08-11 7:18 ` [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Tian, Kevin
2026-08-24 17:24 ` Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=6dc11f18-d03e-4e53-9f46-60882ee4b2d4@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=Sairaj.K@amd.com \
--cc=alejandro.j.jimenez@oracle.com \
--cc=chriscli@google.com \
--cc=dantuluris@google.com \
--cc=iommu@lists.linux.dev \
--cc=jay.chen@amd.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=kpsingh@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=santosh.shukla@amd.com \
--cc=vasant.hegde@amd.com \
--cc=wnliu@google.com \
--cc=wvw@google.com \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®