From: Richard Leitner <richard.leitner@skidata.com>
To: Andy Duan <fugang.duan@nxp.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>
Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"dev@g0hl1n.net" <dev@g0hl1n.net>, Andrew Lunn <andrew@lunn.ch>
Subject: Re: [PATCH 2/2] net: ethernet: fsl: add phy reset after clk enable option
Date: Fri, 7 Jul 2017 11:52:50 +0200 [thread overview]
Message-ID: <6de114cb-4521-4bb2-d0a3-4aea32936bd3@skidata.com> (raw)
In-Reply-To: <AM4PR0401MB226089839458F5F92C3B1F39FFAA0@AM4PR0401MB2260.eurprd04.prod.outlook.com>
On 07/07/2017 09:03 AM, Andy Duan wrote:
> From: Richard Leitner <richard.leitner@skidata.com> Sent: Friday, July 07, 2017 1:51 PM
>>> Since it is common issue so long as using the PHY, can you move it into smsc
>> phy driver like in .smsc_phy_reset() function ?
>>> And get the reset pin from phy dts node.
>>
>> Some more points that come into my mind:
>> - The smsc_phy_reset function is registered as "soft_reset". Would it be OK to
>> use nRST in it?
>
> It is not reasonable.
>
>> - Would it be OK to call the phy_init_hw function from within the
>> smsc_phy_reset?
>
> No, phy_init_hw() already call .drv->soft_reset().
>
>> - IMHO I'd have to move the reset gpio binding inside the phy node then. Isn't
>> that a pretty big change doing that for all PHYs/FECs? Would it be "worth" it?
>>
> To make the change to be common, there have big change for phy driver.
> Maybe somebody can give one good suggestion/solution for it.
Sorry, I don't think I understood everything correctly:
1. The "phy-reset-gpios" binding should go inside the phy node. This
will cause to *change ALL FEC and PHY drivers*. Correct?
2. Add an additonal "hard reset" function to the PHY driver which
handles the "phy-reset-gpios". Correct?
3. Who should then trigger the "hard reset" of the PHY? phy_init_hw? The
FEC?
The point is that the LAN8710 is currently not always working correctly,
therefore this small change was proposed. Should we really change all
PHY/FECs only because of this?
Furthermore one problem still remains: The enet_refclk is controlled by
the FEC. How does the PHY recognize when it was disabled/enabled?
>
> Andy
>
kind regards,
Richard.L
next prev parent reply other threads:[~2017-07-07 9:53 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-06 13:05 [PATCH 1/2] net: ethernet: freescale: simplify fec_reset_phy Richard Leitner
2017-07-06 13:05 ` [PATCH 2/2] net: ethernet: fsl: add phy reset after clk enable option Richard Leitner
2017-07-06 13:55 ` Andrew Lunn
2017-07-06 14:33 ` Richard Leitner
2017-07-07 5:30 ` Andy Duan
2017-07-07 5:50 ` Richard Leitner
2017-07-07 7:03 ` Andy Duan
2017-07-07 9:52 ` Richard Leitner [this message]
2017-07-07 11:08 ` Andy Duan
2017-07-07 11:16 ` Richard Leitner
2017-07-07 14:00 ` Andrew Lunn
2017-07-12 9:21 ` Richard Leitner
2017-07-12 13:40 ` Andrew Lunn
2017-07-10 13:26 ` Rob Herring
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