From: Jon Hunter <jonathanh@nvidia.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
thierry.reding@gmail.com, jingoohan1@gmail.com,
vidyas@nvidia.com, cassel@kernel.org, 18255117159@163.com
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V4 20/22] PCI: tegra194: Use HW version number
Date: Mon, 2 Feb 2026 13:30:47 +0000 [thread overview]
Message-ID: <7f81902d-a1c5-408b-b178-229d8ba0809c@nvidia.com> (raw)
In-Reply-To: <20260126074519.3426742-21-mmaddireddy@nvidia.com>
On 26/01/2026 07:45, Manikanta Maddireddy wrote:
> Tegra194 PCIe driver uses custom version number to detect Tegra194 and
> Tegra234 IPs. With version detect logic added, version check results
> in mismatch warnings.
>
> Use HW version numbers in Tegra194 driver to avoid this kernel warnings.
>
> Fixed version check to enable ecrc for Tegra194.
> Existing 490A check is left intact in case any HW relying on existing check.
>
Fixes tag?
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> V4:
> * This is a new patch in this series
>
> drivers/pci/controller/dwc/pcie-designware.c | 2 +-
> drivers/pci/controller/dwc/pcie-designware.h | 2 ++
> drivers/pci/controller/dwc/pcie-tegra194.c | 4 ++--
> 3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 345365ea97c7..0dac5d2f5a83 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -559,7 +559,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
> if (upper_32_bits(limit_addr) > upper_32_bits(parent_bus_addr) &&
> dw_pcie_ver_is_ge(pci, 460A))
> val |= PCIE_ATU_INCREASE_REGION_SIZE;
> - if (dw_pcie_ver_is(pci, 490A))
> + if (dw_pcie_ver_is(pci, 490A) || dw_pcie_ver_is(pci, 500A))
> val = dw_pcie_enable_ecrc(val);
> dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_REGION_CTRL1, val);
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index f4cf1602cc99..5bceadbd2c9f 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -34,8 +34,10 @@
> #define DW_PCIE_VER_470A 0x3437302a
> #define DW_PCIE_VER_480A 0x3438302a
> #define DW_PCIE_VER_490A 0x3439302a
> +#define DW_PCIE_VER_500A 0x3530302a
> #define DW_PCIE_VER_520A 0x3532302a
> #define DW_PCIE_VER_540A 0x3534302a
> +#define DW_PCIE_VER_562A 0x3536322a
>
> #define __dw_pcie_ver_cmp(_pci, _ver, _op) \
> ((_pci)->version _op DW_PCIE_VER_ ## _ver)
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 6543c6d49fc8..156918ba5ab4 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -35,8 +35,8 @@
> #include <soc/tegra/bpmp-abi.h>
> #include "../../pci.h"
>
> -#define TEGRA194_DWC_IP_VER 0x490A
> -#define TEGRA234_DWC_IP_VER 0x562A
> +#define TEGRA194_DWC_IP_VER DW_PCIE_VER_500A
> +#define TEGRA234_DWC_IP_VER DW_PCIE_VER_562A
>
> #define APPL_PINMUX 0x0
> #define APPL_PINMUX_PEX_RST BIT(0)
--
nvpublic
next prev parent reply other threads:[~2026-02-02 13:30 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-26 7:44 [PATCH V4 00/22] Enhancements to pcie-tegra194 driver Manikanta Maddireddy
2026-01-26 7:44 ` [PATCH V4 01/22] PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" Manikanta Maddireddy
2026-01-26 7:44 ` [PATCH V4 02/22] PCI: tegra194: Drive CLKREQ signal low explicitly Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 03/22] PCI: tegra194: Fix polling delay for L2 state Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 04/22] PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP Manikanta Maddireddy
2026-01-30 17:21 ` Jon Hunter
2026-02-02 5:22 ` Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 05/22] PCI: tegra194: Refactor LTSSM state polling on surprise down Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 06/22] PCI: tegra194: Disable direct speed change for EP Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 07/22] PCI: tegra194: Calibrate P2U for endpoint mode Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 08/22] PCI: tegra194: Free resources during controller deinitialization Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 09/22] PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 10/22] PCI: tegra194: Enable DMA interrupt Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 11/22] PCI: tegra194: Enable hardware hot reset mode in Endpoint Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 12/22] PCI: tegra194: Allow system suspend when the Endpoint link is not up Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 13/22] PCI: tegra194: Disable L1.2 capability of Tegra234 EP Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 14/22] PCI: tegra194: Set LTR message request before PCIe link up Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 15/22] PCI: tegra194: Don't force the device into the D0 state before L2 Manikanta Maddireddy
2026-02-02 13:27 ` Jon Hunter
2026-01-26 7:45 ` [PATCH V4 16/22] PCI: tegra194: Free up EP resources during remove() Manikanta Maddireddy
2026-02-02 13:28 ` Jon Hunter
2026-01-26 7:45 ` [PATCH V4 17/22] dt-bindings: PCI: tegra194: Add monitor clock support Manikanta Maddireddy
2026-01-29 16:40 ` Rob Herring
2026-02-02 4:34 ` Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 18/22] PCI: tegra194: Add core " Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 19/22] PCI: tegra194: Add ASPM L1 entrance latency config Manikanta Maddireddy
2026-02-02 13:28 ` Jon Hunter
2026-01-26 7:45 ` [PATCH V4 20/22] PCI: tegra194: Use HW version number Manikanta Maddireddy
2026-02-02 13:30 ` Jon Hunter [this message]
2026-01-26 7:45 ` [PATCH V4 21/22] PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on Manikanta Maddireddy
2026-01-26 7:45 ` [PATCH V4 22/22] PCI: tegra194: Disable PERST IRQ only in Endpoint mode Manikanta Maddireddy
2026-02-02 13:35 ` [PATCH V4 00/22] Enhancements to pcie-tegra194 driver Jon Hunter
2026-02-05 7:55 ` Manivannan Sadhasivam
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