[PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail

[PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. The slightly misleading
documentation for the video clock controllers doesn't help with this
subject. Correct the performance corners for the MXC rail following
the PLL documentation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Dmitry Baryshkov (6):
      arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail
      arm64: dts: qcom: lemans: correct Iris corners for the MXC rail
      arm64: dts: qcom: monaco: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
      arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail

 arch/arm64/boot/dts/qcom/hamoa.dtsi  |  6 +++---
 arch/arm64/boot/dts/qcom/lemans.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/monaco.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/sm8550.dtsi |  6 +++---
 arch/arm64/boot/dts/qcom/sm8650.dtsi |  8 ++++----
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 12 ++++++------
 6 files changed, 22 insertions(+), 22 deletions(-)
---
base-commit: 5c9e55fecf9365890c64f14761a80f9413a3b1d1
change-id: 20260313-iris-fix-corners-bc7492a67bbd

Best regards,
-- 
With best wishes
Dmitry

[PATCH 1/6] arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 9065340ac04d ("arm64: dts: qcom: x1e80100: Add IRIS video codec")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/hamoa.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index d7596ccf63b9..0866e9e2874d 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -5432,19 +5432,19 @@ opp-338000000 {
 
 				opp-366000000 {
 					opp-hz = /bits/ 64 <366000000>;
-					required-opps = <&rpmhpd_opp_svs_l1>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_svs_l1>;
 				};
 
 				opp-444000000 {
 					opp-hz = /bits/ 64 <444000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-481000000 {
 					opp-hz = /bits/ 64 <481000000>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_turbo>;
 				};
 			};

-- 
2.47.3

[PATCH 2/6] arm64: dts: qcom: lemans: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 7bc95052c64f ("arm64: dts: qcom: sa8775p: add support for video node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/lemans.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 67b2c7e819ad..147ebf9b1ac6 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -4625,19 +4625,19 @@ opp-366000000 {
 
 				opp-444000000 {
 					opp-hz = /bits/ 64 <444000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-533000000 {
 					opp-hz = /bits/ 64 <533000000>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo>;
 				};
 
 				opp-560000000 {
 					opp-hz = /bits/ 64 <560000000>;
-					required-opps = <&rpmhpd_opp_turbo_l1>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo_l1>;
 				};
 			};

-- 
2.47.3

[PATCH 3/6] arm64: dts: qcom: monaco: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: bf6ec39c3f36 ("arm64: dts: qcom: qcs8300: add video node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/monaco.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index f92fdb1cefa0..e175e2967b91 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -5305,19 +5305,19 @@ opp-366000000 {
 
 				opp-444000000 {
 					opp-hz = /bits/ 64 <444000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-533000000 {
 					opp-hz = /bits/ 64 <533000000>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo>;
 				};
 
 				opp-560000000 {
 					opp-hz = /bits/ 64 <560000000>;
-					required-opps = <&rpmhpd_opp_turbo_l1>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo_l1>;
 				};
 			};

-- 
2.47.3

[PATCH 4/6] arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index e3f93f4f412d..6a338c522ee9 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3320,19 +3320,19 @@ opp-338000000 {
 
 				opp-366000000 {
 					opp-hz = /bits/ 64 <366000000>;
-					required-opps = <&rpmhpd_opp_svs_l1>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_svs_l1>;
 				};
 
 				opp-444000000 {
 					opp-hz = /bits/ 64 <444000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-533333334 {
 					opp-hz = /bits/ 64 <533333334>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo>;
 				};
 			};

-- 
2.47.3

[PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 357e43b90740..9437360ea215 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -5236,13 +5236,13 @@ opp-196000000 {
 
 				opp-300000000 {
 					opp-hz = /bits/ 64 <300000000>;
-					required-opps = <&rpmhpd_opp_low_svs>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_low_svs>;
 				};
 
 				opp-380000000 {
 					opp-hz = /bits/ 64 <380000000>;
-					required-opps = <&rpmhpd_opp_svs>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_svs>;
 				};
 
@@ -5254,13 +5254,13 @@ opp-435000000 {
 
 				opp-480000000 {
 					opp-hz = /bits/ 64 <480000000>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-533333334 {
 					opp-hz = /bits/ 64 <533333334>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_turbo>;
 				};
 			};

-- 
2.47.3

[PATCH 6/6] arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
match the PLL corners on the MXC rail. Correct the performance corners
for the MXC rail following the PLL documentation.

Fixes: c0d11ff90475 ("arm64: dts: qcom: sm8750: Add Iris VPU v3.5")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index f56b1f889b85..f34f112d3aa3 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -2945,19 +2945,19 @@ iris_opp_table: opp-table {
 
 				opp-240000000 {
 					opp-hz = /bits/ 64 <240000000>;
-					required-opps = <&rpmhpd_opp_low_svs_d1>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_low_svs_d1>;
 				};
 
 				opp-338000000 {
 					opp-hz = /bits/ 64 <338000000>;
-					required-opps = <&rpmhpd_opp_low_svs>,
+					required-opps = <&rpmhpd_opp_svs>,
 							<&rpmhpd_opp_low_svs>;
 				};
 
 				opp-420000000 {
 					opp-hz = /bits/ 64 <420000000>;
-					required-opps = <&rpmhpd_opp_svs>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_svs>;
 				};
 
@@ -2969,19 +2969,19 @@ opp-444000000 {
 
 				opp-533333334 {
 					opp-hz = /bits/ 64 <533333334>;
-					required-opps = <&rpmhpd_opp_nom>,
+					required-opps = <&rpmhpd_opp_svs_l1>,
 							<&rpmhpd_opp_nom>;
 				};
 
 				opp-570000000 {
 					opp-hz = /bits/ 64 <570000000>;
-					required-opps = <&rpmhpd_opp_nom_l1>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_nom_l1>;
 				};
 
 				opp-630000000 {
 					opp-hz = /bits/ 64 <630000000>;
-					required-opps = <&rpmhpd_opp_turbo>,
+					required-opps = <&rpmhpd_opp_nom>,
 							<&rpmhpd_opp_turbo>;
 				};
 			};

-- 
2.47.3

Re: [PATCH 4/6] arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index e3f93f4f412d..6a338c522ee9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -3320,19 +3320,19 @@ opp-338000000 {
>  
>  				opp-366000000 {
>  					opp-hz = /bits/ 64 <366000000>;
> -					required-opps = <&rpmhpd_opp_svs_l1>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_svs_l1>;
>  				};
>  
>  				opp-444000000 {
>  					opp-hz = /bits/ 64 <444000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-533333334 {
>  					opp-hz = /bits/ 64 <533333334>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 4/6] arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 41661853ae8e ("arm64: dts: qcom: sm8550: add iris DT node")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index e3f93f4f412d..6a338c522ee9 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -3320,19 +3320,19 @@ opp-338000000 {
>  
>  				opp-366000000 {
>  					opp-hz = /bits/ 64 <366000000>;
> -					required-opps = <&rpmhpd_opp_svs_l1>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_svs_l1>;
>  				};
>  
>  				opp-444000000 {
>  					opp-hz = /bits/ 64 <444000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-533333334 {
>  					opp-hz = /bits/ 64 <533333334>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 1/6] arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 9065340ac04d ("arm64: dts: qcom: x1e80100: Add IRIS video codec")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/hamoa.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> index d7596ccf63b9..0866e9e2874d 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> @@ -5432,19 +5432,19 @@ opp-338000000 {
>  
>  				opp-366000000 {
>  					opp-hz = /bits/ 64 <366000000>;
> -					required-opps = <&rpmhpd_opp_svs_l1>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_svs_l1>;
>  				};
>  
>  				opp-444000000 {
>  					opp-hz = /bits/ 64 <444000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-481000000 {
>  					opp-hz = /bits/ 64 <481000000>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 6/6] arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: c0d11ff90475 ("arm64: dts: qcom: sm8750: Add Iris VPU v3.5")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8750.dtsi | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index f56b1f889b85..f34f112d3aa3 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -2945,19 +2945,19 @@ iris_opp_table: opp-table {
>  
>  				opp-240000000 {
>  					opp-hz = /bits/ 64 <240000000>;
> -					required-opps = <&rpmhpd_opp_low_svs_d1>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_low_svs_d1>;
>  				};
>  
>  				opp-338000000 {
>  					opp-hz = /bits/ 64 <338000000>;
> -					required-opps = <&rpmhpd_opp_low_svs>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_low_svs>;
>  				};
>  
>  				opp-420000000 {
>  					opp-hz = /bits/ 64 <420000000>;
> -					required-opps = <&rpmhpd_opp_svs>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_svs>;
>  				};
>  
> @@ -2969,19 +2969,19 @@ opp-444000000 {
>  
>  				opp-533333334 {
>  					opp-hz = /bits/ 64 <533333334>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-570000000 {
>  					opp-hz = /bits/ 64 <570000000>;
> -					required-opps = <&rpmhpd_opp_nom_l1>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_nom_l1>;
>  				};
>  
>  				opp-630000000 {
>  					opp-hz = /bits/ 64 <630000000>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 357e43b90740..9437360ea215 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -5236,13 +5236,13 @@ opp-196000000 {
>  
>  				opp-300000000 {
>  					opp-hz = /bits/ 64 <300000000>;

I see in the document that this level value should be 280000000, could you
pls check and update accordingly.

> -					required-opps = <&rpmhpd_opp_low_svs>,
> +					required-opps = <&rpmhpd_opp_svs>,
>  							<&rpmhpd_opp_low_svs>;
>  				};
>  
>  				opp-380000000 {
>  					opp-hz = /bits/ 64 <380000000>;
> -					required-opps = <&rpmhpd_opp_svs>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_svs>;
>  				};
>  
> @@ -5254,13 +5254,13 @@ opp-435000000 {
>  
>  				opp-480000000 {
>  					opp-hz = /bits/ 64 <480000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-533333334 {
>  					opp-hz = /bits/ 64 <533333334>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  			};
> 

with above comment addressed.

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 2/6] arm64: dts: qcom: lemans: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. Correct the performance corners
> for the MXC rail following the PLL documentation.
> 
> Fixes: 7bc95052c64f ("arm64: dts: qcom: sa8775p: add support for video node")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/lemans.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
> index 67b2c7e819ad..147ebf9b1ac6 100644
> --- a/arch/arm64/boot/dts/qcom/lemans.dtsi
> +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
> @@ -4625,19 +4625,19 @@ opp-366000000 {
>  
>  				opp-444000000 {
>  					opp-hz = /bits/ 64 <444000000>;
> -					required-opps = <&rpmhpd_opp_nom>,
> +					required-opps = <&rpmhpd_opp_svs_l1>,
>  							<&rpmhpd_opp_nom>;
>  				};
>  
>  				opp-533000000 {
>  					opp-hz = /bits/ 64 <533000000>;
> -					required-opps = <&rpmhpd_opp_turbo>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_turbo>;
>  				};
>  
>  				opp-560000000 {
>  					opp-hz = /bits/ 64 <560000000>;
> -					required-opps = <&rpmhpd_opp_turbo_l1>,
> +					required-opps = <&rpmhpd_opp_nom>,
>  							<&rpmhpd_opp_turbo_l1>;
>  				};
>  			};
> 

Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>

Thanks,
Dikshita

Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail

[Dmitry Baryshkov]

On Wed, Mar 18, 2026 at 10:54:07AM +0530, Dikshita Agarwal wrote:
> 
> 
> On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
> > The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> > match the PLL corners on the MXC rail. Correct the performance corners
> > for the MXC rail following the PLL documentation.
> > 
> > Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > index 357e43b90740..9437360ea215 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> > @@ -5236,13 +5236,13 @@ opp-196000000 {
> >  
> >  				opp-300000000 {
> >  					opp-hz = /bits/ 64 <300000000>;
> 
> I see in the document that this level value should be 280000000, could you
> pls check and update accordingly.

I cross-checked, the table for SM8650 lists 300 MHz here.

> 
> > -					required-opps = <&rpmhpd_opp_low_svs>,
> > +					required-opps = <&rpmhpd_opp_svs>,
> >  							<&rpmhpd_opp_low_svs>;
> >  				};
> >  
> >  				opp-380000000 {
> >  					opp-hz = /bits/ 64 <380000000>;
> > -					required-opps = <&rpmhpd_opp_svs>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_svs>;
> >  				};
> >  
> > @@ -5254,13 +5254,13 @@ opp-435000000 {
> >  
> >  				opp-480000000 {
> >  					opp-hz = /bits/ 64 <480000000>;
> > -					required-opps = <&rpmhpd_opp_nom>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_nom>;
> >  				};
> >  
> >  				opp-533333334 {
> >  					opp-hz = /bits/ 64 <533333334>;
> > -					required-opps = <&rpmhpd_opp_turbo>,
> > +					required-opps = <&rpmhpd_opp_svs_l1>,
> >  							<&rpmhpd_opp_turbo>;
> >  				};
> >  			};
> > 
> 
> with above comment addressed.
> 
> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
> 
> Thanks,
> Dikshita

-- 
With best wishes
Dmitry

Re: [PATCH 5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail

[Dikshita Agarwal]

On 3/18/2026 12:32 PM, Dmitry Baryshkov wrote:
> On Wed, Mar 18, 2026 at 10:54:07AM +0530, Dikshita Agarwal wrote:
>>
>>
>> On 3/13/2026 8:57 PM, Dmitry Baryshkov wrote:
>>> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
>>> match the PLL corners on the MXC rail. Correct the performance corners
>>> for the MXC rail following the PLL documentation.
>>>
>>> Fixes: 56cf5ad39a55 ("arm64: dts: qcom: sm8650: add iris DT node")
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 8 ++++----
>>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> index 357e43b90740..9437360ea215 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> @@ -5236,13 +5236,13 @@ opp-196000000 {
>>>  
>>>  				opp-300000000 {
>>>  					opp-hz = /bits/ 64 <300000000>;
>>
>> I see in the document that this level value should be 280000000, could you
>> pls check and update accordingly.
> 
> I cross-checked, the table for SM8650 lists 300 MHz here.

Ack.

Thanks,
Dikshita
> 
>>
>>> -					required-opps = <&rpmhpd_opp_low_svs>,
>>> +					required-opps = <&rpmhpd_opp_svs>,
>>>  							<&rpmhpd_opp_low_svs>;
>>>  				};
>>>  
>>>  				opp-380000000 {
>>>  					opp-hz = /bits/ 64 <380000000>;
>>> -					required-opps = <&rpmhpd_opp_svs>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_svs>;
>>>  				};
>>>  
>>> @@ -5254,13 +5254,13 @@ opp-435000000 {
>>>  
>>>  				opp-480000000 {
>>>  					opp-hz = /bits/ 64 <480000000>;
>>> -					required-opps = <&rpmhpd_opp_nom>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_nom>;
>>>  				};
>>>  
>>>  				opp-533333334 {
>>>  					opp-hz = /bits/ 64 <533333334>;
>>> -					required-opps = <&rpmhpd_opp_turbo>,
>>> +					required-opps = <&rpmhpd_opp_svs_l1>,
>>>  							<&rpmhpd_opp_turbo>;
>>>  				};
>>>  			};
>>>
>>
>> with above comment addressed.
>>
>> Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
>>
>> Thanks,
>> Dikshita
> 

Re: [PATCH 0/6] arm64: dts: qcom: correct Iris corners for the MXC rail

[Bjorn Andersson]

On Fri, 13 Mar 2026 17:27:07 +0200, Dmitry Baryshkov wrote:
> The corners of the MVS0 / MVS0C clocks on the MMCX rail don't always
> match the PLL corners on the MXC rail. The slightly misleading
> documentation for the video clock controllers doesn't help with this
> subject. Correct the performance corners for the MXC rail following
> the PLL documentation.
> 
> 
> [...]

Applied, thanks!

[1/6] arm64: dts: qcom: hamoa: correct Iris corners for the MXC rail
      commit: c8e354964507d97cef405b2633790f99bb6a5020
[2/6] arm64: dts: qcom: lemans: correct Iris corners for the MXC rail
      commit: a98ebb7e62a93a8d75de705e866d0398bb80afcf
[3/6] arm64: dts: qcom: monaco: correct Iris corners for the MXC rail
      commit: 509be41a761f018db2669ccec22fbdf7bca1ed03
[4/6] arm64: dts: qcom: sm8550: correct Iris corners for the MXC rail
      commit: e973ef6fa0f7ed10dd3efefdba1a41d011e463cb
[5/6] arm64: dts: qcom: sm8650: correct Iris corners for the MXC rail
      commit: c87d630e1b02cd0118373c4344be4895cf2def33
[6/6] arm64: dts: qcom: sm8750: correct Iris corners for the MXC rail
      commit: 3d51fdb6d08c867c1a067457a5c5766a6f6fe9b9

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>