Re: [PATCH V3 08/17] perf/x86: Add YMM into sample_simd_vec_regs

["Mi, Dapeng" <dapeng1.mi@linux.intel.com>]

On 8/16/2025 5:34 AM, kan.liang@linux.intel.com wrote:
> From: Kan Liang <kan.liang@linux.intel.com>
>
> The YMM0-15 is composed of XMM and YMMH. It requires 2 XSAVE commands to
> get the complete value. Internally, the XMM and YMMH are stored in
> different structures, which follow the XSAVE format. But the output
> dumps the YMM as a whole.
>
> The qwords 4 imply YMM.
>
> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
> ---
>  arch/x86/events/core.c                | 13 +++++++++++++
>  arch/x86/include/asm/perf_event.h     |  4 ++++
>  arch/x86/include/uapi/asm/perf_regs.h |  4 +++-
>  arch/x86/kernel/perf_regs.c           | 10 +++++++++-
>  4 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 1789b91c95c6..aebd4e56dff1 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -423,6 +423,9 @@ static void x86_pmu_get_ext_regs(struct x86_perf_regs *perf_regs, u64 mask)
>  
>  	if (valid_mask & XFEATURE_MASK_SSE)
>  		perf_regs->xmm_space = xsave->i387.xmm_space;
> +
> +	if (valid_mask & XFEATURE_MASK_YMM)
> +		perf_regs->ymmh = get_xsave_addr(xsave, XFEATURE_YMM);
>  }
>  
>  static void release_ext_regs_buffers(void)
> @@ -725,6 +728,9 @@ int x86_pmu_hw_config(struct perf_event *event)
>  			if (event->attr.sample_simd_vec_reg_qwords >= PERF_X86_XMM_QWORDS &&
>  			    !(x86_pmu.ext_regs_mask & XFEATURE_MASK_SSE))
>  				return -EINVAL;
> +			if (event->attr.sample_simd_vec_reg_qwords >= PERF_X86_YMM_QWORDS &&
> +			    !(x86_pmu.ext_regs_mask & XFEATURE_MASK_YMM))
> +				return -EINVAL;
>  		}
>  	}
>  	return x86_setup_perfctr(event);
> @@ -1837,6 +1843,13 @@ void x86_pmu_setup_regs_data(struct perf_event *event,
>  		mask |= XFEATURE_MASK_SSE;
>  	}
>  
> +	if (attr->sample_simd_regs_enabled) {
> +		if (attr->sample_simd_vec_reg_qwords >= PERF_X86_YMM_QWORDS) {
> +			perf_regs->ymmh_regs = NULL;
> +			mask |= XFEATURE_MASK_YMM;
> +		}
> +	}
> +
>  	mask &= ~ignore_mask;
>  	if (mask)
>  		x86_pmu_get_ext_regs(perf_regs, mask);
> diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
> index 538219c59979..81e3143fd91a 100644
> --- a/arch/x86/include/asm/perf_event.h
> +++ b/arch/x86/include/asm/perf_event.h
> @@ -597,6 +597,10 @@ struct x86_perf_regs {
>  		u64	*xmm_regs;
>  		u32	*xmm_space;	/* for xsaves */
>  	};
> +	union {
> +		u64	*ymmh_regs;
> +		struct ymmh_struct *ymmh;
> +	};
>  };
>  
>  extern unsigned long perf_arch_instruction_pointer(struct pt_regs *regs);
> diff --git a/arch/x86/include/uapi/asm/perf_regs.h b/arch/x86/include/uapi/asm/perf_regs.h
> index bd8af802f757..feb3e8f80761 100644
> --- a/arch/x86/include/uapi/asm/perf_regs.h
> +++ b/arch/x86/include/uapi/asm/perf_regs.h
> @@ -59,6 +59,8 @@ enum perf_event_x86_regs {
>  #define PERF_X86_SIMD_VEC_MASK		GENMASK_ULL(PERF_X86_SIMD_VEC_REGS_MAX - 1, 0)
>  
>  #define PERF_X86_XMM_QWORDS		2
> -#define PERF_X86_SIMD_QWORDS_MAX	PERF_X86_XMM_QWORDS
> +#define PERF_X86_YMM_QWORDS		4
> +#define PERF_X86_YMMH_QWORDS		(PERF_X86_YMM_QWORDS / 2)
> +#define PERF_X86_SIMD_QWORDS_MAX	PERF_X86_YMM_QWORDS
>  
>  #endif /* _ASM_X86_PERF_REGS_H */
> diff --git a/arch/x86/kernel/perf_regs.c b/arch/x86/kernel/perf_regs.c
> index 397357c5896b..d94bc687e4bf 100644
> --- a/arch/x86/kernel/perf_regs.c
> +++ b/arch/x86/kernel/perf_regs.c
> @@ -66,6 +66,9 @@ void perf_simd_reg_check(struct pt_regs *regs,
>  	if (*vec_qwords >= PERF_X86_XMM_QWORDS && !perf_regs->xmm_regs)
>  		*nr_vectors = 0;
>  
> +	if (*vec_qwords >= PERF_X86_YMM_QWORDS && !perf_regs->xmm_regs)

should be "!perf_regs->ymmh_regs"?


> +		*vec_qwords = PERF_X86_XMM_QWORDS;
> +
>  	*nr_pred = 0;
>  }
>  
> @@ -105,6 +108,10 @@ u64 perf_simd_reg_value(struct pt_regs *regs, int idx,
>  		if (!perf_regs->xmm_regs)
>  			return 0;
>  		return perf_regs->xmm_regs[idx * PERF_X86_XMM_QWORDS + qwords_idx];
> +	} else if (qwords_idx < PERF_X86_YMM_QWORDS) {
> +		if (!perf_regs->ymmh_regs)
> +			return 0;
> +		return perf_regs->ymmh_regs[idx * PERF_X86_YMMH_QWORDS + qwords_idx - PERF_X86_XMM_QWORDS];
>  	}
>  
>  	return 0;
> @@ -121,7 +128,8 @@ int perf_simd_reg_validate(u16 vec_qwords, u64 vec_mask,
>  		if (vec_mask)
>  			return -EINVAL;
>  	} else {
> -		if (vec_qwords != PERF_X86_XMM_QWORDS)
> +		if (vec_qwords != PERF_X86_XMM_QWORDS &&
> +		    vec_qwords != PERF_X86_YMM_QWORDS)
>  			return -EINVAL;
>  		if (vec_mask & ~PERF_X86_SIMD_VEC_MASK)
>  			return -EINVAL;