Re: [POC PATCH 14/17] perf/x86/regs: Only support legacy regs for the PT and PERF_REGS_MASK for now

[Adrian Hunter <adrian.hunter@intel.com>]

On 16/08/2025 00:34, kan.liang@linux.intel.com wrote:
> From: Kan Liang <kan.liang@linux.intel.com>
> 
> The PERF_REG_X86_64_MAX is going to be updated to support more regs,
> e.g., eGPRs.
> However, the PT and PERF_REGS_MASK will not be touched in the POC.
> Using the PERF_REG_X86_R15 + 1 to replace PERF_REG_X86_64_MAX.
> 
> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>

For intel-pt.c

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  tools/perf/arch/x86/include/perf_regs.h | 2 +-
>  tools/perf/util/intel-pt.c              | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/perf/arch/x86/include/perf_regs.h b/tools/perf/arch/x86/include/perf_regs.h
> index f209ce2c1dd9..793fb597b03f 100644
> --- a/tools/perf/arch/x86/include/perf_regs.h
> +++ b/tools/perf/arch/x86/include/perf_regs.h
> @@ -17,7 +17,7 @@ void perf_regs_load(u64 *regs);
>  		       (1ULL << PERF_REG_X86_ES) | \
>  		       (1ULL << PERF_REG_X86_FS) | \
>  		       (1ULL << PERF_REG_X86_GS))
> -#define PERF_REGS_MASK (((1ULL << PERF_REG_X86_64_MAX) - 1) & ~REG_NOSUPPORT)
> +#define PERF_REGS_MASK (((1ULL << (PERF_REG_X86_R15 + 1)) - 1) & ~REG_NOSUPPORT)
>  #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
>  #endif
>  
> diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c
> index 9b1011fe4826..a9585524f2e1 100644
> --- a/tools/perf/util/intel-pt.c
> +++ b/tools/perf/util/intel-pt.c
> @@ -2181,7 +2181,7 @@ static u64 *intel_pt_add_gp_regs(struct regs_dump *intr_regs, u64 *pos,
>  	u32 bit;
>  	int i;
>  
> -	for (i = 0, bit = 1; i < PERF_REG_X86_64_MAX; i++, bit <<= 1) {
> +	for (i = 0, bit = 1; i < PERF_REG_X86_R15 + 1; i++, bit <<= 1) {
>  		/* Get the PEBS gp_regs array index */
>  		int n = pebs_gp_regs[i] - 1;
>