mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Mathias Krause <minipli@grsecurity.net>
To: Sean Christopherson <seanjc@google.com>
Cc: Chao Gao <chao.gao@intel.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	x86@kernel.org, pbonzini@redhat.com, dave.hansen@intel.com,
	rick.p.edgecombe@intel.com, mlevitsk@redhat.com,
	john.allen@amd.com, weijiang.yang@intel.com, xin@zytor.com,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH v11 19/23] KVM: x86: Enable CET virtualization for VMX and advertise to userspace
Date: Tue, 22 Jul 2025 07:49:21 +0200	[thread overview]
Message-ID: <96a0a8b2-3ebd-466c-9c6e-8ba63cd4e2e3@grsecurity.net> (raw)
In-Reply-To: <aH58w_wHx3Crklp4@google.com>

On 21.07.25 19:45, Sean Christopherson wrote:
> On Mon, Jul 21, 2025, Mathias Krause wrote:
>> Can we please make CR4.CET a guest-owned bit as well (sending a patch in
>> a second)? It's a logical continuation to making CR0.WP a guest-owned
>> bit just that it's even easier this time, as no MMU role bits are
>> involved and it still makes a big difference, at least for grsecurity
>> guest kernels.
> 
> Out of curiosity, what's the use case for toggling CR4.CET at runtime?

Plain and simple: architectural requirements to be able to toggle CR0.WP.

>> Using the old test from [1] gives the following numbers (perf stat -r 5
>> ssdd 10 50000):
>>
>> * grsec guest on linux-6.16-rc5 + cet patches:
>>   2.4647 +- 0.0706 seconds time elapsed  ( +-  2.86% )
>>
>> * grsec guest on linux-6.16-rc5 + cet patches + CR4.CET guest-owned:
>>   1.5648 +- 0.0240 seconds time elapsed  ( +-  1.53% )
>>
>> Not only is it ~35% faster, it's also more stable, less fluctuation due
>> to less VMEXITs, I believe.

Above test exercises the "pain path" by single-stepping a process and
constantly switching between tracer and tracee. The scheduling part
involves a CR0.WP toggle in grsecurity to be able to write to r/o
memory, which now requires toggling CR4.CET as well.

>>
>> Thanks,
>> Mathias
>>
>> [1]
>> https://lore.kernel.org/kvm/20230322013731.102955-1-minipli@grsecurity.net/
> 
>> From 14ef5d8b952744c46c32f16fea3b29184cde3e65 Mon Sep 17 00:00:00 2001
>> From: Mathias Krause <minipli@grsecurity.net>
>> Date: Mon, 21 Jul 2025 13:45:55 +0200
>> Subject: [PATCH] KVM: VMX: Make CR4.CET a guest owned bit
>>
>> There's no need to intercept changes of CR4.CET, make it a guest-owned
>> bit where possible.
> 
> In the changelog, please elaborate on the assertion that CR4.CET doesn't need to
> be intercepted, and include the motiviation and perf numbers.  KVM's "rule" is
> to disable interception of something if and only if there is a good reason for
> doing so, because generally speaking intercepting is safer.  E.g. KVM bugs are
> less likely to put the host at risk.  "Because we can" isn't not a good reason :-)

Understood, will extend the changelog accordingly.

> 
> E.g. at one point CR4.LA57 was a guest-owned bit, and the code was buggy.  Fixing
> things took far more effort than it should have there was no justification for
> the logic (IIRC, it was done purely on the whims of the original developer).
> 
> KVM has had many such cases, where some weird behavior was never documented/justified,
> and I really, really want to avoid committing the same sins that have caused me
> so much pain :-)

I totally understand your reasoning, "just because" shouldn't be the
justification. In this case, however, not making it a guest-owned bit
has a big performance impact for grsecurity, we would like to address.

The defines and asserts regarding KVM_MMU_CR4_ROLE_BITS and
KVM_POSSIBLE_CR4_GUEST_BITS (and KVM_MMU_CR0_ROLE_BITS /
KVM_POSSIBLE_CR0_GUEST_BITS too) should catch future attempts on
involving CR4.CET in any MMU-related decisions and I found no other use
of the (nested) guest's CR4.CET value beside for sanity checks to
prevent invalid architectural state (CR4.CET=1 but CR0.WP=0).

That is, imho, existing documentation regarding the expectations on
guest-owned bits and, even better, with BUILD_BUG_ON()s enforcing these.


Thanks,
Mathias

  reply	other threads:[~2025-07-22  5:49 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-04  8:49 [PATCH v11 00/23] Enable CET Virtualization Chao Gao
2025-07-04  8:49 ` [PATCH v11 01/23] KVM: x86: Rename kvm_{g,s}et_msr()* to show that they emulate guest accesses Chao Gao
2025-07-24 11:37   ` Huang, Kai
2025-07-24 13:31     ` Sean Christopherson
2025-07-28 22:31   ` Xin Li
2025-07-29  0:45     ` Chao Gao
2025-07-29 18:19       ` Sean Christopherson
2025-07-04  8:49 ` [PATCH v11 02/23] KVM: x86: Add kvm_msr_{read,write}() helpers Chao Gao
2025-07-04  8:49 ` [PATCH v11 03/23] KVM: x86: Manually clear MPX state only on INIT Chao Gao
2025-07-04  8:49 ` [PATCH v11 04/23] KVM: x86: Zero XSTATE components on INIT by iterating over supported features Chao Gao
2025-07-04  8:49 ` [PATCH v11 05/23] KVM: x86: Introduce KVM_{G,S}ET_ONE_REG uAPIs support Chao Gao
2025-07-04  8:49 ` [PATCH v11 06/23] KVM: x86: Report XSS as to-be-saved if there are supported features Chao Gao
2025-07-04  8:49 ` [PATCH v11 07/23] KVM: x86: Refresh CPUID on write to guest MSR_IA32_XSS Chao Gao
2025-07-04  8:49 ` [PATCH v11 08/23] KVM: x86: Initialize kvm_caps.supported_xss Chao Gao
2025-07-04  8:49 ` [PATCH v11 09/23] KVM: x86: Load guest FPU state when access XSAVE-managed MSRs Chao Gao
2025-07-04  8:49 ` [PATCH v11 10/23] KVM: x86: Add fault checks for guest CR4.CET setting Chao Gao
2025-07-04  8:49 ` [PATCH v11 11/23] KVM: x86: Report KVM supported CET MSRs as to-be-saved Chao Gao
2025-07-04  8:49 ` [PATCH v11 12/23] KVM: VMX: Introduce CET VMCS fields and control bits Chao Gao
2025-07-28 22:53   ` Xin Li
2025-07-29  1:30     ` Chao Gao
2025-07-29  2:17       ` Xin Li
2025-07-04  8:49 ` [PATCH v11 13/23] KVM: x86: Enable guest SSP read/write interface with new uAPIs Chao Gao
2025-07-04  8:49 ` [PATCH v11 14/23] KVM: VMX: Emulate read and write to CET MSRs Chao Gao
2025-07-04  8:49 ` [PATCH v11 15/23] KVM: x86: Save and reload SSP to/from SMRAM Chao Gao
2025-07-04  8:49 ` [PATCH v11 16/23] KVM: VMX: Set up interception for CET MSRs Chao Gao
2025-07-04  8:49 ` [PATCH v11 17/23] KVM: VMX: Set host constant supervisor states to VMCS fields Chao Gao
2025-07-04  8:49 ` [PATCH v11 18/23] KVM: x86: Don't emulate instructions guarded by CET Chao Gao
2025-07-04  8:49 ` [PATCH v11 19/23] KVM: x86: Enable CET virtualization for VMX and advertise to userspace Chao Gao
2025-07-21 15:51   ` Mathias Krause
2025-07-21 17:45     ` Sean Christopherson
2025-07-22  5:49       ` Mathias Krause [this message]
2025-07-22 14:13         ` Sean Christopherson
2025-07-22 21:25         ` [PATCH v2] KVM: VMX: Make CR4.CET a guest owned bit Mathias Krause
2025-07-23  6:24           ` Chao Gao
2025-08-06 20:58   ` [PATCH v11 19/23] KVM: x86: Enable CET virtualization for VMX and advertise to userspace John Allen
2025-08-06 22:47     ` Sean Christopherson
2025-07-04  8:49 ` [PATCH v11 20/23] KVM: nVMX: Virtualize NO_HW_ERROR_CODE_CC for L1 event injection to L2 Chao Gao
2025-07-04  8:49 ` [PATCH v11 21/23] KVM: nVMX: Enable CET support for nested guest Chao Gao
2025-07-28  6:30   ` Xin Li
2025-07-28  8:42     ` Chao Gao
2025-07-04  8:49 ` [PATCH v11 22/23] KVM: nVMX: Add consistency checks for CR0.WP and CR4.CET Chao Gao
2025-07-04  8:49 ` [PATCH v11 23/23] KVM: nVMX: Add consistency checks for CET states Chao Gao
2025-07-06 16:51 ` [PATCH v11 00/23] Enable CET Virtualization Xiaoyao Li
2025-07-07  1:32   ` Chao Gao
2025-07-16 20:36     ` John Allen
2025-07-17  7:00       ` Mathias Krause
2025-07-17  7:57         ` Chao Gao
2025-07-21 18:08           ` John Allen
2025-07-21 15:35 ` Mathias Krause

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=96a0a8b2-3ebd-466c-9c6e-8ba63cd4e2e3@grsecurity.net \
    --to=minipli@grsecurity.net \
    --cc=bp@alien8.de \
    --cc=chao.gao@intel.com \
    --cc=dave.hansen@intel.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=john.allen@amd.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=mlevitsk@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=rick.p.edgecombe@intel.com \
    --cc=seanjc@google.com \
    --cc=tglx@linutronix.de \
    --cc=weijiang.yang@intel.com \
    --cc=x86@kernel.org \
    --cc=xin@zytor.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®