[PATCH v6 0/2] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.

[PATCH v6 0/2] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.

[Taniya Das]

[v6]
 Update commit subject and commit message for both the DT patches [Bjorn]
 Subset of the patch series applied: (Removed from this series)
   Link to v5: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-0-4a9f17dc683a@quicinc.com

[v5]
  Rebased the device tree patch to add clock controller nodes.

[v4]
  Changes in [v4] compared to [v3]
  Videocc: Update the mvs0/mvs1 gdsc to use HW_CTRL_TRIGGER [Konrad and Qualcomm
  internal discussions]
  Camcc:   Add new clock to the clock tree.
  Change the patch order for 'Update sleep_clk frequency to 32000 on SA8775P' [Krzysztof]

Changes in [v3] compared to [v2]:
  Update the qcom_cc_really_probe() to use &pdev->dev, for the CAMCC, DISPCC & VIDEOCC drivers.

[v2]
https://lore.kernel.org/all/20240612-sa8775p-mm-clock-controllers-v1-0-db295a846ee7@quicinc.com/
Changes in [v2] compared to [v1]:
  [PATCH 1/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 3/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 5/8]: Updated bindings to reference qcom,gcc.yaml
  [PATCH 7/8]: Split updating sleep_clk frequency to separate patch
  [PATCH 8/8]: Newly added to update sleep_clk frequency to 32000
  These multimedia clock controller and device tree patches are split from the below [v1] series.

[v1]
https://lore.kernel.org/all/20240531090249.10293-1-quic_tdas@quicinc.com/

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
Taniya Das (2):
      arm64: dts: qcom: sa8775p: Update sleep_clk frequency
      arm64: dts: qcom: sa8775p: Add support for clock controllers

 arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi |  2 +-
 arch/arm64/boot/dts/qcom/sa8775p.dtsi      | 57 ++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+), 1 deletion(-)
---
base-commit: 0cca97bf23640ff68a6e8a74e9b6659fdc27f48c
change-id: 20241010-sa8775p-mm-v4-resend-patches-42735def52a0

Best regards,
-- 
Taniya Das <quic_tdas@quicinc.com>

[PATCH v6 1/2] arm64: dts: qcom: sa8775p: Update sleep_clk frequency

[Taniya Das]

Fix the sleep_clk frequency is 32000 on SA8775P.

Fixes: 603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
index 0c1b21def4b62cc65a693552983ec0bc7eec697d..adb71aeff339b564eb3acc42a38bba2f03507508 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi
@@ -517,7 +517,7 @@ &serdes1 {
 };
 
 &sleep_clk {
-	clock-frequency = <32764>;
+	clock-frequency = <32000>;
 };
 
 &spi16 {

-- 
2.45.2

[PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Taniya Das]

Add support for video, camera, display0 and display1 clock controllers
on SA8775P. The dispcc1 will be enabled based on board requirements.

Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 57 +++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index e8dbc8d820a64f45c62edebca7ce4583a5c716e0..e56a725128e5ec228133a1b008ac2114a4682bef 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -3254,6 +3254,47 @@ llcc: system-cache-controller@9200000 {
 			interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		videocc: clock-controller@abf0000 {
+			compatible = "qcom,sa8775p-videocc";
+			reg = <0x0 0x0abf0000 0x0 0x10000>;
+			clocks = <&gcc GCC_VIDEO_AHB_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK_A>,
+				 <&sleep_clk>;
+			power-domains = <&rpmhpd SA8775P_MMCX>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
+
+		camcc: clock-controller@ade0000 {
+			compatible = "qcom,sa8775p-camcc";
+			reg = <0x0 0x0ade0000 0x0 0x20000>;
+			clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK_A>,
+				 <&sleep_clk>;
+			power-domains = <&rpmhpd SA8775P_MMCX>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
+
+		dispcc0: clock-controller@af00000 {
+			compatible = "qcom,sa8775p-dispcc0";
+			reg = <0x0 0x0af00000 0x0 0x20000>;
+			clocks = <&gcc GCC_DISP_AHB_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK_A>,
+				 <&sleep_clk>,
+				 <0>, <0>, <0>, <0>,
+				 <0>, <0>, <0>, <0>;
+			power-domains = <&rpmhpd SA8775P_MMCX>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+		};
+
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
 			reg = <0x0 0x0b220000 0x0 0x30000>,
@@ -3876,6 +3917,22 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
 			};
 		};
 
+		dispcc1: clock-controller@22100000 {
+			compatible = "qcom,sa8775p-dispcc1";
+			reg = <0x0 0x22100000 0x0 0x20000>;
+			clocks = <&gcc GCC_DISP_AHB_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK>,
+				 <&rpmhcc RPMH_CXO_CLK_A>,
+				 <&sleep_clk>,
+				 <0>, <0>, <0>, <0>,
+				 <0>, <0>, <0>, <0>;
+			power-domains = <&rpmhpd SA8775P_MMCX>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
+
 		ethernet1: ethernet@23000000 {
 			compatible = "qcom,sa8775p-ethqos";
 			reg = <0x0 0x23000000 0x0 0x10000>,

-- 
2.45.2

Re: [PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Konrad Dybcio]

On 25.10.2024 10:52 AM, Taniya Das wrote:
> Add support for video, camera, display0 and display1 clock controllers
> on SA8775P. The dispcc1 will be enabled based on board requirements.
> 
> Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Konrad Dybcio]

On 25.10.2024 8:42 PM, Konrad Dybcio wrote:
> On 25.10.2024 10:52 AM, Taniya Das wrote:
>> Add support for video, camera, display0 and display1 clock controllers
>> on SA8775P. The dispcc1 will be enabled based on board requirements.

Actually, why would that be? CCF should park it gracefully with
unused cleanup

Konrad

>>
>> Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> ---
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> 
> Konrad

Re: [PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Taniya Das]

On 10/26/2024 12:12 AM, Konrad Dybcio wrote:
> On 25.10.2024 8:42 PM, Konrad Dybcio wrote:
>> On 25.10.2024 10:52 AM, Taniya Das wrote:
>>> Add support for video, camera, display0 and display1 clock controllers
>>> on SA8775P. The dispcc1 will be enabled based on board requirements.
> 
> Actually, why would that be? CCF should park it gracefully with
> unused cleanup
> 

Yes, CCF should take care to cleanup. But I am of an opinion that as we 
are aware that this platform do not require the dispcc1 so we could 
avoid the clock driver initialization and help in boot KPI.

> Konrad
> 
>>>
>>> Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>> ---
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>
>> Konrad

-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Bjorn Andersson]

On Tue, Dec 03, 2024 at 10:04:13AM +0530, Taniya Das wrote:
> 
> 
> On 10/26/2024 12:12 AM, Konrad Dybcio wrote:
> > On 25.10.2024 8:42 PM, Konrad Dybcio wrote:
> > > On 25.10.2024 10:52 AM, Taniya Das wrote:
> > > > Add support for video, camera, display0 and display1 clock controllers
> > > > on SA8775P. The dispcc1 will be enabled based on board requirements.
> > 
> > Actually, why would that be? CCF should park it gracefully with
> > unused cleanup
> > 
> 
> Yes, CCF should take care to cleanup. But I am of an opinion that as we are
> aware that this platform do not require the dispcc1 so we could avoid the
> clock driver initialization and help in boot KPI.
> 

Does that imply that we're guaranteed that the bootloader will never
configure any clocks in dispcc1 that needs to be gracefully parked from
the OS? Is this guaranteed to be the case for all QCS9100 boards?

IMHO we should default to correctness, and then make product-specific
boot time optimizations from that starting point.

Regards,
Bjorn

> > Konrad
> > 
> > > > 
> > > > Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> > > > Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> > > > ---
> > > 
> > > Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> > > 
> > > Konrad
> 
> -- 
> Thanks & Regards,
> Taniya Das.

Re: [PATCH v6 2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers

[Taniya Das]

On 12/3/2024 9:02 PM, Bjorn Andersson wrote:
> On Tue, Dec 03, 2024 at 10:04:13AM +0530, Taniya Das wrote:
>>
>>
>> On 10/26/2024 12:12 AM, Konrad Dybcio wrote:
>>> On 25.10.2024 8:42 PM, Konrad Dybcio wrote:
>>>> On 25.10.2024 10:52 AM, Taniya Das wrote:
>>>>> Add support for video, camera, display0 and display1 clock controllers
>>>>> on SA8775P. The dispcc1 will be enabled based on board requirements.
>>>
>>> Actually, why would that be? CCF should park it gracefully with
>>> unused cleanup
>>>
>>
>> Yes, CCF should take care to cleanup. But I am of an opinion that as we are
>> aware that this platform do not require the dispcc1 so we could avoid the
>> clock driver initialization and help in boot KPI.
>>
> 
> Does that imply that we're guaranteed that the bootloader will never
> configure any clocks in dispcc1 that needs to be gracefully parked from
> the OS? Is this guaranteed to be the case for all QCS9100 boards?
> 

Yes, bootloader will never use DISPCC1.

> IMHO we should default to correctness, and then make product-specific
> boot time optimizations from that starting point.
> 

As I was sure it will not be used on this board, so I left it disabled.

> Regards,
> Bjorn
> 
>>> Konrad
>>>
>>>>>
>>>>> Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
>>>>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>>>>> ---
>>>>
>>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>
>>>> Konrad
>>
>> -- 
>> Thanks & Regards,
>> Taniya Das.

-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH v6 0/2] Add support for videocc, camcc, dispcc0 and dispcc1 on Qualcomm SA8775P platform.

[Bjorn Andersson]

On Fri, 25 Oct 2024 14:22:52 +0530, Taniya Das wrote:
> [v6]
>  Update commit subject and commit message for both the DT patches [Bjorn]
>  Subset of the patch series applied: (Removed from this series)
>    Link to v5: https://lore.kernel.org/r/20241011-sa8775p-mm-v4-resend-patches-v5-0-4a9f17dc683a@quicinc.com
> 
> [v5]
>   Rebased the device tree patch to add clock controller nodes.
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: qcom: sa8775p: Update sleep_clk frequency
      commit: 30f7dfd2c4899630becf477447e8bbe92683d2c6
[2/2] arm64: dts: qcom: sa8775p: Add support for clock controllers
      commit: 727dc481e50a4de846c49d6ef761616f299d127b

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>