From: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Amit Kucheria <amitk@kernel.org>,
Thara Gopinath <thara.gopinath@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>
Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Amit Kucheria <amit.kucheria@oss.qualcomm.com>
Subject: Re: [PATCH 4/6] thermal: qcom: tsens: add hardware-bin trip-point filtering
Date: Tue, 27 Oct 2026 18:29:13 +0530 [thread overview]
Message-ID: <991e6b64-8741-4669-9bbf-e31eed788f42@oss.qualcomm.com> (raw)
In-Reply-To: <e7788a12-3cad-4bd4-9f79-82cd118e0049@oss.qualcomm.com>
On 10/26/2026 5:21 PM, Konrad Dybcio wrote:
> On 10/23/26 12:01 PM, Gaurav Kohli wrote:
>>
>>
>> On 10/22/2026 2:39 PM, Konrad Dybcio wrote:
>>> On 10/2/26 12:46 PM, Gaurav Kohli wrote:
>>>> From: Amit Kucheria <amit.kucheria@oss.qualcomm.com>
>>>>
>>>> Some Qualcomm SoCs are binned at manufacturing time and expose the bin
>>>> in qfprom fuses. The thermal core's supported_hw_bin mechanism filters
>>>> trip points by hardware version; wire tsens up to feed it.
>>>
>>> [...]
>>>
>>>> + /* Hardware-bin values for thermal-hw-bin matching in DT. */
>>>> + const u32 hw_bin_std = 0x1;
>>>> + const u32 hw_bin_elevated = 0x2;
>>>> +
>>>> + /* Higher thermal profile identification for qcm6490/sc7280 bins. */
>>>> + const u32 tsens_chip_id0 = 0x197;
>>>> + const u32 tsens_chip_id1 = 0x198;
>>>> + const u32 tsens_chip_id2 = 0x20e;
>>>> + const u32 tsens_chip_id3 = 0x20f;
>>>> + const u8 tsens_feat_id2 = 0x2;
>>>> + const u8 tsens_feat_id3 = 0x3;
>>>> + const u8 tsens_feat_id4 = 0x4;
>>>
>>> Isn't that (also) exposed over SMEM?
>>
>> Thanks Konrad, for review.
>>
>> SMEM has related socinfo data, but there is no exported helper for the
>> exact fields needed here, such as feat-id, which is also used as the bin
>> value.
>
> Is that different to qcom_smem_get_feature_code()?
Thanks for review.
I am checking internally and will update with the exact difference from
feat-id. My understanding is that qcom_smem_get_feature_code() returns
the SMEM socinfo feature_code, while this code needs the QFPROM feat-id
field from the JTAG ID fuse word.
For this series, would prefer to keep the fuse-based path. The same
binding is also used by the generic i-temp fuse bit for Hamoa/future
targets, while the jtag-id/feat-id decoding remains only the
Kodiak/QCM6490-specific callback. Please let me know if you are fine
with this approach.
>
>> This jtag-id/feat-id decoding is Kodiak/QCM6490-specific, and the
>> thermal-bin mapping needs both values. Other/future targets are expected
>> to use only the generic i-temp fuse bit, like Hamoa.
>
> So there are variants of kodiak that ""incorrectly"" set the feat_id?
No, Kodiak is not incorrectly setting it.
Kodiak/QCM6490 does not use the generic i-temp bit for this thermal
profile selection, it is using feat id only for high TJ profile. The
i-temp path is for Hamoa/future targets where the thermal bin is exposed
as single bit.
>
> Konrad
next prev parent reply other threads:[~2026-10-27 12:59 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 10:46 [PATCH 0/6] thermal: Add hardware-binned trip point support Gaurav Kohli
2026-10-02 10:46 ` [PATCH 1/6] dt-bindings: thermal: thermal-zones: add hardware-binning trip properties Gaurav Kohli
2026-10-13 6:24 ` Krzysztof Kozlowski
2026-10-19 14:09 ` Gaurav Kohli
2026-10-02 10:46 ` [PATCH 2/6] thermal: add hardware-binning trip-point filtering support Gaurav Kohli
2026-10-02 10:46 ` [PATCH 3/6] dt-bindings: thermal: qcom-tsens: document qcm6490 tsens Gaurav Kohli
2026-10-02 10:46 ` [PATCH 4/6] thermal: qcom: tsens: add hardware-bin trip-point filtering Gaurav Kohli
2026-10-22 9:09 ` Konrad Dybcio
2026-10-23 10:01 ` Gaurav Kohli
2026-10-26 11:51 ` Konrad Dybcio
2026-10-27 12:59 ` Gaurav Kohli [this message]
2026-10-02 10:47 ` [PATCH 5/6] arm64: dts: qcom: kodiak: use thermal hw-bin trips Gaurav Kohli
2026-10-22 9:09 ` Konrad Dybcio
2026-10-22 13:39 ` Gaurav Kohli
2026-10-02 10:47 ` [PATCH 6/6] arm64: dts: qcom: hamoa: add thermal hw-bin support Gaurav Kohli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=991e6b64-8741-4669-9bbf-e31eed788f42@oss.qualcomm.com \
--to=gaurav.kohli@oss.qualcomm.com \
--cc=abelvesa@kernel.org \
--cc=amit.kucheria@oss.qualcomm.com \
--cc=amitk@kernel.org \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=corbet@lwn.net \
--cc=daniel.lezcano@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=lukasz.luba@arm.com \
--cc=rafael@kernel.org \
--cc=rdunlap@infradead.org \
--cc=robh@kernel.org \
--cc=rui.zhang@intel.com \
--cc=skhan@linuxfoundation.org \
--cc=thara.gopinath@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®