[patch] xtensa: enforce slab alignment to maximum register width

[patch] xtensa: enforce slab alignment to maximum register width

[Johannes Weiner]

From: Oskar Schirmer <os@emlix.com>

XCHAL_DATA_WIDTH is the maximum register width, slab caches should be
aligned to this.

Theoretical fix as all variants have had an XCHAL_DATA_WIDTH of 4
(wordsize) for now.  But the S6000 variant will raise this to 16.

Signed-off-by: Oskar Schirmer <os@emlix.com>
Signed-off-by: Johannes Weiner <jw@emlix.com>
---
 arch/xtensa/include/asm/processor.h |    2 ++
 1 file changed, 2 insertions(+)

--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -25,6 +25,8 @@
 # error Linux requires the Xtensa Windowed Registers Option.
 #endif
 
+#define ARCH_SLAB_MINALIGN	XCHAL_DATA_WIDTH
+
 /*
  * User space process size: 1 GB.
  * Windowed call ABI requires caller and callee to be located within the same

Re: [patch] xtensa: enforce slab alignment to maximum register width

[Pekka Enberg]

On Wed, Mar 4, 2009 at 3:56 PM, Johannes Weiner <jw@emlix.com> wrote:
> From: Oskar Schirmer <os@emlix.com>
>
> XCHAL_DATA_WIDTH is the maximum register width, slab caches should be
> aligned to this.
>
> Theoretical fix as all variants have had an XCHAL_DATA_WIDTH of 4
> (wordsize) for now.  But the S6000 variant will raise this to 16.
>
> Signed-off-by: Oskar Schirmer <os@emlix.com>
> Signed-off-by: Johannes Weiner <jw@emlix.com>
> ---
>  arch/xtensa/include/asm/processor.h |    2 ++
>  1 file changed, 2 insertions(+)
>
> --- a/arch/xtensa/include/asm/processor.h
> +++ b/arch/xtensa/include/asm/processor.h
> @@ -25,6 +25,8 @@
>  # error Linux requires the Xtensa Windowed Registers Option.
>  #endif
>
> +#define ARCH_SLAB_MINALIGN     XCHAL_DATA_WIDTH
> +

Looks good to me!

Acked-by: Pekka Enberg <penberg@cs.helsinki.fi>

[PATCH] nand_bbt.c, kernel 2.6.28.7

[Basterash, Tom]

[-- Attachment #1: Type: text/plain, Size: 1059 bytes --]

New to the Linux kernel development community here...

This is a patch for a bug I found in an older version of the kernel I'm
using on a project (2.6.10).  (The defect still exists in the latest
version of the kernel 2.6.28.7, hence the reason for the post.)  For
NAND chips with large block sizes (128K in our case) I was getting an
out of memory error when I attempted to store the bad block table in
flash.  This patch fixes that error by allocating memory in the same way
it's done in another function in the file.  Feedback desired: Does the
fix seem reasonable?  If so, what else must be done to have it
incorporated into the source tree?  Thx.
The information contained in this message is privileged and intended only for the recipients named. If the reader is not a representative of the intended recipient, any review, dissemination or copying of this message or the information it contains is prohibited. If you have received this message in error, please immediately notify the sender, and delete the original message and attachments.

[-- Attachment #2: nand_bbt.patch --]
[-- Type: application/octet-stream, Size: 604 bytes --]

--- linux-2.6.28.7/orig/drivers/mtd/nand/nand_bbt.c
+++ linux-2.6.28.7/mod/drivers/mtd/nand/nand_bbt.c
@@ -1027,11 +1027,10 @@
 	if (!this->bbt || !td)
 		return -EINVAL;
 
-	len = mtd->size >> (this->bbt_erase_shift + 2);
 	/* Allocate a temporary buffer for one eraseblock incl. oob */
 	len = (1 << this->bbt_erase_shift);
 	len += (len >> this->page_shift) * mtd->oobsize;
-	buf = kmalloc(len, GFP_KERNEL);
+	buf = vmalloc(len);
 	if (!buf) {
 		printk(KERN_ERR "nand_update_bbt: Out of memory\n");
 		return -ENOMEM;
@@ -1064,7 +1063,7 @@
 	}
 
  out:
-	kfree(buf);
+	vfree(buf);
 	return res;
 }
 

[-- Attachment #3: README --]
[-- Type: application/octet-stream, Size: 190 bytes --]

Fixes an out of memory error found when attempting to store the bad block table in nand flash for chips that have large (128K) block sizes.  Generated by Tom Basterash <tbasterash@trane.com>