From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Zide Chen <zide.chen@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org
Subject: Re: [PATCH V2 5/8] perf/x86/intel/uncore: Factor out box setup code
Date: Wed, 3 Jun 2026 09:30:31 +0800 [thread overview]
Message-ID: <a533aa3d-c2e5-44c8-b007-fdf6c6d977b2@linux.intel.com> (raw)
In-Reply-To: <20260601170114.173359-6-zide.chen@intel.com>
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
On 6/2/2026 1:01 AM, Zide Chen wrote:
> The PCI uncore PMU path already implements a lazy registration model:
> the PMU is registered when the first active box appears and
> unregistered when the last active box is removed.
>
> Factor this registration management into a shared helper, so the same
> code can be reused by the MSR and MMIO paths in later changes.
>
> No functional change intended.
>
> Reviewed-by: Ian Rogers <irogers@google.com>
> Signed-off-by: Zide Chen <zide.chen@intel.com>
> ---
> arch/x86/events/intel/uncore.c | 40 ++++++++++++++++++++++++----------
> 1 file changed, 28 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
> index 6df44f69cc5b..283e41933ba7 100644
> --- a/arch/x86/events/intel/uncore.c
> +++ b/arch/x86/events/intel/uncore.c
> @@ -1148,6 +1148,29 @@ uncore_pci_find_dev_pmu(struct pci_dev *pdev, const struct pci_device_id *ids)
> return pmu;
> }
>
> +static int uncore_box_setup(struct intel_uncore_pmu *pmu,
> + struct intel_uncore_box *box)
> +{
> + int ret;
> +
> + uncore_box_init(box);
> +
> + /* First active box registers the pmu. */
> + if (atomic_inc_return(&pmu->activeboxes) > 1)
> + return 0;
> +
> + ret = uncore_pmu_register(pmu);
> + if (ret) {
> + atomic_dec(&pmu->activeboxes);
> + goto err;
> + }
> +
> + return 0;
> +err:
> + uncore_box_exit(box);
> + return ret;
> +}
> +
> /*
> * Register the PMU for a PCI device
> * @pdev: The PCI device.
> @@ -1173,20 +1196,13 @@ static int uncore_pci_pmu_register(struct pci_dev *pdev,
> box->dieid = die;
> box->pci_dev = pdev;
> box->pmu = pmu;
> - uncore_box_init(box);
>
> - pmu->boxes[die] = box;
> - if (atomic_inc_return(&pmu->activeboxes) > 1)
> - return 0;
> -
> - /* First active box registers the pmu */
> - ret = uncore_pmu_register(pmu);
> - if (ret) {
> - atomic_dec(&pmu->activeboxes);
> - pmu->boxes[die] = NULL;
> - uncore_box_exit(box);
> + ret = uncore_box_setup(pmu, box);
> + if (!ret)
> + pmu->boxes[die] = box;
> + else
> kfree(box);
> - }
> +
> return ret;
> }
>
next prev parent reply other threads:[~2026-06-03 1:30 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-01 17:01 [PATCH v2 0/8] perf/x86/intel/uncore: PMU setup robustness fixes Zide Chen
2026-06-01 17:01 ` [PATCH V2 1/8] perf/x86/intel/uncore: Fix PCI PMU cleanup on setup failure Zide Chen
2026-06-02 7:24 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 2/8] perf/x86/intel/uncore: Fix refcnt and other cleanups Zide Chen
2026-06-02 9:52 ` Mi, Dapeng
2026-06-02 14:16 ` Chen, Zide
2026-06-03 1:13 ` Mi, Dapeng
2026-06-03 15:09 ` Chen, Zide
2026-06-04 1:00 ` Mi, Dapeng
2026-06-04 15:41 ` Chen, Zide
2026-06-05 0:30 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 3/8] perf/x86/intel/uncore: Let init_box() callback report failures Zide Chen
2026-06-02 9:57 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 4/8] perf/x86/intel/uncore: Keep PCI PMUs working when MMIO/MSR setup fails Zide Chen
2026-06-03 1:24 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 5/8] perf/x86/intel/uncore: Factor out box setup code Zide Chen
2026-06-03 1:30 ` Mi, Dapeng [this message]
2026-06-01 17:01 ` [PATCH V2 6/8] perf/x86/intel/uncore: Introduce PMU flags and broken state Zide Chen
2026-06-03 2:13 ` Mi, Dapeng
2026-06-03 15:46 ` Chen, Zide
2026-06-04 1:15 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 7/8] perf/x86/intel/uncore: Fix uncore_box ref/unref ordering on CPU hotplug Zide Chen
2026-06-03 2:32 ` Mi, Dapeng
2026-06-03 16:40 ` Chen, Zide
2026-06-04 1:16 ` Mi, Dapeng
2026-06-01 17:01 ` [PATCH V2 8/8] perf/x86/intel/uncore: Implement lazy setup for MSR/MMIO PMU Zide Chen
2026-06-03 2:43 ` Mi, Dapeng
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