From: Jessica Zhang <quic_jesszhan@quicinc.com>
To: Jun Nie <jun.nie@linaro.org>, Rob Clark <robdclark@gmail.com>,
"Abhinav Kumar" <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>
Cc: <linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 05/15] drm/msm/dpu: decide right side per last bit
Date: Fri, 14 Feb 2025 16:29:24 -0800 [thread overview]
Message-ID: <a7480f8b-9f56-4f1d-a4d2-0760a516fe9a@quicinc.com> (raw)
In-Reply-To: <20250118-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-33-v5-5-9701a16340da@linaro.org>
On 1/17/2025 8:00 AM, Jun Nie wrote:
> Currently, only one pair of mixers is supported, so a non-zero counter
> value is sufficient to identify the correct mixer within that pair.
> However, future implementations may involve multiple mixer pairs. With
> the current implementation, all mixers within the second pair would be
> incorrectly selected as right mixer. To correctly select the mixer
> within a pair, test the least significant bit of the counter. If the
> least significant bit is not set, select the mixer as left one;
> otherwise, select the mixer as right one for all pairs.
>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index 7191b1a6d41b3..41c9d3e3e3c7c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -369,11 +369,10 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
> static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
> {
> struct dpu_crtc_state *crtc_state;
> - int lm_idx, lm_horiz_position;
> + int lm_idx;
>
> crtc_state = to_dpu_crtc_state(crtc->state);
>
> - lm_horiz_position = 0;
> for (lm_idx = 0; lm_idx < crtc_state->num_mixers; lm_idx++) {
> const struct drm_rect *lm_roi = &crtc_state->lm_bounds[lm_idx];
> struct dpu_hw_mixer *hw_lm = crtc_state->mixers[lm_idx].hw_lm;
> @@ -384,7 +383,7 @@ static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
>
> cfg.out_width = drm_rect_width(lm_roi);
> cfg.out_height = drm_rect_height(lm_roi);
> - cfg.right_mixer = lm_horiz_position++;
> + cfg.right_mixer = lm_idx & 0x1;
> cfg.flags = 0;
> hw_lm->ops.setup_mixer_out(hw_lm, &cfg);
> }
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2025-02-15 0:29 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-17 16:00 [PATCH v5 00/15] drm/msm/dpu: Support quad pipe with dual-DSI Jun Nie
2025-01-17 16:00 ` [PATCH v5 01/15] drm/msm/dpu: check every pipe per capability Jun Nie
2025-01-17 16:00 ` [PATCH v5 02/15] drm/msm/dpu: Do not fix number of DSC Jun Nie
2025-02-07 1:12 ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 03/15] drm/msm/dpu: configure DSC per number in use Jun Nie
2025-02-07 1:14 ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 04/15] drm/msm/dpu: polish log for resource allocation Jun Nie
2025-02-15 0:25 ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 05/15] drm/msm/dpu: decide right side per last bit Jun Nie
2025-02-15 0:29 ` Jessica Zhang [this message]
2025-01-17 16:00 ` [PATCH v5 06/15] drm/msm/dpu: fix mixer number counter on allocation Jun Nie
2025-02-15 0:48 ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 07/15] drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation Jun Nie
2025-01-17 16:00 ` [PATCH v5 08/15] drm/msm/dpu: bind correct pingpong for quad pipe Jun Nie
2025-01-20 13:15 ` Marijn Suijten
2025-01-20 23:24 ` Jun Nie
2025-01-17 16:00 ` [PATCH v5 09/15] drm/msm/dpu: Add pipe as trace argument Jun Nie
2025-02-15 0:33 ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 10/15] drm/msm/dpu: handle pipes as array Jun Nie
2025-01-17 16:00 ` [PATCH v5 11/15] drm/msm/dpu: split PIPES_PER_STAGE definition per plane and mixer Jun Nie
2025-01-17 16:00 ` [PATCH v5 12/15] drm/msm/dpu: blend pipes per mixer pairs config Jun Nie
2025-01-17 16:00 ` [PATCH v5 13/15] drm/msm/dpu: support SSPP assignment for quad-pipe case Jun Nie
2025-01-17 16:00 ` [PATCH v5 14/15] drm/msm/dpu: support plane splitting in " Jun Nie
2025-01-17 16:00 ` [PATCH v5 15/15] drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case Jun Nie
2025-01-23 23:31 ` [PATCH v5 00/15] drm/msm/dpu: Support quad pipe with dual-DSI Jessica Zhang
2025-01-24 18:07 ` Jun Nie
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