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From: Jessica Zhang <quic_jesszhan@quicinc.com>
To: Jun Nie <jun.nie@linaro.org>, Rob Clark <robdclark@gmail.com>,
	"Abhinav Kumar" <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>,
	Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>
Cc: <linux-arm-msm@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 02/15] drm/msm/dpu: Do not fix number of DSC
Date: Thu, 6 Feb 2025 17:12:22 -0800	[thread overview]
Message-ID: <db2ec4cb-9769-4d76-a8a3-308c83d77602@quicinc.com> (raw)
In-Reply-To: <20250118-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-33-v5-2-9701a16340da@linaro.org>



On 1/17/2025 8:00 AM, Jun Nie wrote:
> Currently, if DSC is enabled, only 2 DSC engines are supported so far.
> More usage cases will be added, such as 4 DSC in 4:4:2 topology. So
> get the real number of DSCs to decide whether DSC merging is needed.
> 
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index eaac172141ede..c734d2c5790d2 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -164,6 +164,7 @@ enum dpu_enc_rc_states {
>    *				clks and resources after IDLE_TIMEOUT time.
>    * @topology:                   topology of the display
>    * @idle_timeout:		idle timeout duration in milliseconds
> + * @num_dscs:			Number of DSCs in use
>    * @wide_bus_en:		wide bus is enabled on this interface
>    * @dsc:			drm_dsc_config pointer, for DSC-enabled encoders
>    */
> @@ -204,6 +205,7 @@ struct dpu_encoder_virt {
>   	struct msm_display_topology topology;
>   
>   	u32 idle_timeout;
> +	u32 num_dscs;
>   
>   	bool wide_bus_en;
>   
> @@ -622,9 +624,8 @@ bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc)
>   		if (dpu_enc->phys_encs[i])
>   			intf_count++;
>   
> -	/* See dpu_encoder_get_topology, we only support 2:2:1 topology */
>   	if (dpu_enc->dsc)
> -		num_dsc = 2;
> +		num_dsc = dpu_enc->num_dscs;
>   
>   	return (num_dsc > 0) && (num_dsc > intf_count);
>   }
> @@ -1261,6 +1262,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
>   		dsc_mask |= BIT(dpu_enc->hw_dsc[i]->idx - DSC_0);
>   	}
>   
> +	dpu_enc->num_dscs = num_dsc;
>   	dpu_enc->dsc_mask = dsc_mask;
>   
>   	if ((dpu_enc->disp_info.intf_type == INTF_WB && conn_state->writeback_job) ||
> 
> -- 
> 2.34.1
> 


  reply	other threads:[~2025-02-07  1:12 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-17 16:00 [PATCH v5 00/15] drm/msm/dpu: Support quad pipe with dual-DSI Jun Nie
2025-01-17 16:00 ` [PATCH v5 01/15] drm/msm/dpu: check every pipe per capability Jun Nie
2025-01-17 16:00 ` [PATCH v5 02/15] drm/msm/dpu: Do not fix number of DSC Jun Nie
2025-02-07  1:12   ` Jessica Zhang [this message]
2025-01-17 16:00 ` [PATCH v5 03/15] drm/msm/dpu: configure DSC per number in use Jun Nie
2025-02-07  1:14   ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 04/15] drm/msm/dpu: polish log for resource allocation Jun Nie
2025-02-15  0:25   ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 05/15] drm/msm/dpu: decide right side per last bit Jun Nie
2025-02-15  0:29   ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 06/15] drm/msm/dpu: fix mixer number counter on allocation Jun Nie
2025-02-15  0:48   ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 07/15] drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation Jun Nie
2025-01-17 16:00 ` [PATCH v5 08/15] drm/msm/dpu: bind correct pingpong for quad pipe Jun Nie
2025-01-20 13:15   ` Marijn Suijten
2025-01-20 23:24     ` Jun Nie
2025-01-17 16:00 ` [PATCH v5 09/15] drm/msm/dpu: Add pipe as trace argument Jun Nie
2025-02-15  0:33   ` Jessica Zhang
2025-01-17 16:00 ` [PATCH v5 10/15] drm/msm/dpu: handle pipes as array Jun Nie
2025-01-17 16:00 ` [PATCH v5 11/15] drm/msm/dpu: split PIPES_PER_STAGE definition per plane and mixer Jun Nie
2025-01-17 16:00 ` [PATCH v5 12/15] drm/msm/dpu: blend pipes per mixer pairs config Jun Nie
2025-01-17 16:00 ` [PATCH v5 13/15] drm/msm/dpu: support SSPP assignment for quad-pipe case Jun Nie
2025-01-17 16:00 ` [PATCH v5 14/15] drm/msm/dpu: support plane splitting in " Jun Nie
2025-01-17 16:00 ` [PATCH v5 15/15] drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case Jun Nie
2025-01-23 23:31 ` [PATCH v5 00/15] drm/msm/dpu: Support quad pipe with dual-DSI Jessica Zhang
2025-01-24 18:07   ` Jun Nie

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