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From: Nicolin Chen <nicolinc@nvidia.com>
To: Mostafa Saleh <smostafa@google.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <kvmarm@lists.linux.dev>,
	<iommu@lists.linux.dev>, <catalin.marinas@arm.com>,
	<will@kernel.org>, <maz@kernel.org>, <oliver.upton@linux.dev>,
	<joey.gouly@arm.com>, <suzuki.poulose@arm.com>,
	<yuzenghui@huawei.com>, <joro@8bytes.org>, <jgg@ziepe.ca>,
	<mark.rutland@arm.com>, <qperret@google.com>, <tabba@google.com>,
	<vdonnefort@google.com>, <sebastianene@google.com>,
	<keirf@google.com>
Subject: Re: [PATCH v8 11/25] iommu/arm-smmu-v3-kvm: Add the kernel driver
Date: Tue, 22 Sep 2026 17:22:29 -0700	[thread overview]
Message-ID: <arMbxX+sqTS3gByB@nvidia.com> (raw)
In-Reply-To: <20260922131259.2975334-12-smostafa@google.com>

On Tue, Sep 22, 2026 at 01:12:44PM +0000, Mostafa Saleh wrote:
> When KVM runs in protected mode, and CONFIG_ARM_SMMU_V3_PKVM
> is enabled, it will manage the SMMUv3 HW using trap and emulate
> and present emulated SMMUs to the host kernel.
> 
> In that case, those SMMUs will be on the aux bus, so make it
> possible to the driver to probe those devices.
> 
> Otherwise, everything else is the same, as the KVM emulation
> complies with the architecture,so the driver doesn't need

Missing space before "so".

> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-kvm.c
> @@ -0,0 +1,187 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * pKVM host driver for the Arm SMMUv3

I am a bit confused by pkvm/arm-smmu-v3.c and arm-smmu-v3-kvm.c

It would be nicer to have a design doc or diagram here and the
other place to show their relationships (with host and KVM too).

Naming-wise, could it be arm-smmu-v3-pkvm? I also wonder if we
could move it into the pkvm folder:
  pkvm/arm-smmu-v3-hyp.c
  pkvm/arm-smmu-v3.c

> + *
> + * Copyright (C) 2022 Linaro Ltd.
> + */
> +#include <asm/kvm_mmu.h>
> +#include <asm/kvm_pkvm.h>
> +
> +#include <linux/auxiliary_bus.h>
> +#include <linux/of_address.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +
> +#include "arm-smmu-v3.h"
> +#include "pkvm/arm-smmu-v3-hyp.h"
> +
> +extern struct pkvm_iommu_ops kvm_nvhe_sym(smmu_ops);
> +
> +static size_t				kvm_arm_smmu_count;
> +static struct hyp_arm_smmu_v3_device	*kvm_arm_smmu_array;
> +static size_t				kvm_arm_smmu_cur;

That spaces/tabs in those two lines look a bit odd..

> +static unsigned int smmu_hyp_pgt_pages(void)
> +{
> +	struct device_node *np = of_find_compatible_node(NULL, NULL, "arm,smmu-v3");
> +
> +	/*
> +	 * SMMUv3 uses the same format as the CPU stage-2 and hence have the same memory
> +	 * requirements, we add extra 500 pages for L2 STEs.
> +	 * Only one set of memory is allocated as the page table is shared between all
> +	 * the SMMUs.

Mind briefly elaborate the 500 pages in this notes? Why pick 500?

Also, there is no hard requirement, but the main driver still wraps
inline comments at 80 cols. So, it would be nicer for this driver to
follow that.

> +	 */
> +	if (np) {
> +		of_node_put(np);
> +		return host_s2_pgtable_pages() + 500;
> +	}
> +
> +	return 0;
> +}
> +
> +static struct platform_driver smmuv3_nesting_driver;
> +static int smmuv3_nesting_probe(struct platform_device *pdev)
> +{
> +	struct hyp_arm_smmu_v3_device *smmu = &kvm_arm_smmu_array[kvm_arm_smmu_cur];
> +	struct device *dev = &pdev->dev;
> +	struct resource *res;
> +
> +	/* Only device tree, ACPI not supported. */
> +	if (!dev->of_node)
> +		return -EINVAL;

Sashiko reported a critical finding, which sounds plausible to me:
"
Can an adversary bypass pKVM stage-2 memory protections here?
If an SMMU fails to bind to the hypervisor due to early returns in this
probe function (like missing a device tree node or hitting the cavium
erratum below), it is excluded from kvm_arm_smmu_array and the hypervisor
does not trap its MMIO.
When the native host arm_smmu_driver registers at device_initcall, it can
successfully bind to this unbound SMMU. Does this allow an adversary host
kernel at EL1 to natively program this untrapped SMMU to perform arbitrary
DMA into hypervisor or guest memory?
"

Would you please justify?

> +	if (kvm_arm_smmu_cur >= kvm_arm_smmu_count)
> +		return -ENOSPC;

Both counts and probe() are coming from Device Tree. So, it doesn't
seem possible unless a kernel bug. Should it WARN_ON?

> +	smmu->mmio_addr = res->start;
> +	smmu->mmio_size = resource_size(res);
> +	if (smmu->mmio_size < SZ_128K) {
> +		dev_err(dev, "MMIO region too small(%pr)\n", res);
> +		return -EINVAL;
> +	}

Should it reject !PAGE_ALIGNED(addr|size) like the other driver?

> +static int __init kvm_arm_smmu_v3_register(void)
> +{
[...]
> +out_err:
> +	kvm_arm_smmu_count = 0;
> +	kvm_arm_smmu_array = NULL;
> +	return ret;
> +};

No ';' after '}'.

> +static int kvm_arm_smmu_v3_post_init(void)

__init?

> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -5203,6 +5204,72 @@ static struct platform_driver arm_smmu_driver = {
>  module_driver(arm_smmu_driver, platform_driver_register,
>  	      arm_smmu_driver_unregister);
>  
> +#ifdef CONFIG_ARM_SMMU_V3_PKVM
> +/*
> + * Now we have 2 devices, the aux device bound to this driver, and pdev
> + * which is the physical platform device bound to the KVM driver but not used.
> + * However, this driver keeps using the platform device for 2 reasons:
> + * 1) Simplicity: Avoiding changing big parts of the code assuming
> + *    the underlying device is a platform device.
> + * 2) Dealing with DMA-API, irqs(MSIs), RPM... requires the physical device.
> + *
> + * That means arm_smmu_device_probe() allocates its devm resources on the
> + * platform device, where they are not freed when the aux device unbinds.
> + * The devres group bounds them to the lifetime of this binding instead.

There is an "unbinds", so I assume it should be:

s/bounds/binds

?

Nicolin

  reply	other threads:[~2026-09-23  0:22 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-22 13:12 [PATCH v8 00/25] KVM: arm64: SMMUv3 driver for pKVM (trap and emulate) Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 01/25] KVM: arm64: Donate MMIO to the hypervisor Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 02/25] iommu/arm-smmu-v3: Move Queue and STE functions to header Mostafa Saleh
2026-09-22 18:23   ` Nicolin Chen
2026-09-22 13:12 ` [PATCH v8 03/25] iommu/arm-smmu-v3: Introduce RangeInval encoding helpers Mostafa Saleh
2026-09-22 18:45   ` Nicolin Chen
2026-09-22 13:12 ` [PATCH v8 04/25] iommu/arm-smmu-v3: Move IDR parsing to common functions Mostafa Saleh
2026-09-22 19:45   ` Nicolin Chen
2026-09-22 21:48     ` Jason Gunthorpe
2026-09-23 10:13       ` Mostafa Saleh
2026-09-23 11:55         ` Jason Gunthorpe
2026-09-23 12:21           ` Mostafa Saleh
2026-09-23 10:09     ` Mostafa Saleh
2026-09-23 11:52       ` Jason Gunthorpe
2026-09-23 12:18         ` Mostafa Saleh
2026-09-23 12:34           ` Jason Gunthorpe
2026-09-22 13:12 ` [PATCH v8 05/25] iommu/arm-smmu-v3: Move hitless machinery to common code Mostafa Saleh
2026-09-22 19:59   ` Nicolin Chen
2026-09-23 10:15     ` Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 06/25] KVM: arm64: iommu: Introduce IOMMU driver infrastructure Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 07/25] KVM: arm64: iommu: Shadow host stage-2 page table Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 08/25] KVM: arm64: iommu: Add memory pool Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 09/25] KVM: arm64: iommu: Support DABT for IOMMU Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 10/25] iommu/arm-smmu-v3-kvm: Add SMMUv3 driver Mostafa Saleh
2026-09-22 22:39   ` Nicolin Chen
2026-09-23 10:30     ` Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 11/25] iommu/arm-smmu-v3-kvm: Add the kernel driver Mostafa Saleh
2026-09-23  0:22   ` Nicolin Chen [this message]
2026-09-23 11:52     ` Mostafa Saleh
2026-09-23 15:55       ` Jason Gunthorpe
2026-09-23 17:07         ` Mostafa Saleh
2026-09-23 17:22           ` Jason Gunthorpe
2026-09-22 13:12 ` [PATCH v8 12/25] iommu/arm-smmu-v3-kvm: Probe SMMU HW Mostafa Saleh
2026-09-23  1:43   ` Nicolin Chen
2026-09-23 12:03     ` Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 13/25] iommu/arm-smmu-v3-kvm: Add MMIO emulation Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 14/25] iommu/arm-smmu-v3-kvm: Shadow the command queue Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 15/25] iommu/arm-smmu-v3-kvm: Add CMDQ functions Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 16/25] iommu/arm-smmu-v3-kvm: Emulate CMDQ for host Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 17/25] iommu/arm-smmu-v3-kvm: Shadow stream table Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 18/25] iommu/arm-smmu-v3-kvm: Shadow STEs Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 19/25] iommu/arm-smmu-v3-kvm: Share other queues Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 20/25] iommu/arm-smmu-v3-kvm: Emulate GBPA Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 21/25] iommu/io-pgtable-arm: Support io-pgtable-arm in the hypervisor Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 22/25] iommu/arm-smmu-v3-kvm: Shadow the CPU stage-2 page table Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 23/25] iommu/arm-smmu-v3-kvm: Invalidate the SMMU TLBs Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 24/25] iommu/arm-smmu-v3-kvm: Enable nesting Mostafa Saleh
2026-09-22 13:12 ` [PATCH v8 25/25] KVM: arm64: Add documentation for pKVM DMA isolation Mostafa Saleh
2026-09-22 18:07 ` [PATCH v8 00/25] KVM: arm64: SMMUv3 driver for pKVM (trap and emulate) Nicolin Chen
2026-09-23  8:52   ` Mostafa Saleh

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