From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>,
Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>,
<joro@8bytes.org>, <bhelgaas@google.com>, <praan@google.com>,
<kevin.tian@intel.com>, <kees@kernel.org>, <smostafa@google.com>,
<baolu.lu@linux.intel.com>,
Jean-Philippe Brucker <jpb@kernel.org>,
Eric Auger <eric.auger@redhat.com>,
<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<skaestle@nvidia.com>, <mmarrid@nvidia.com>,
<skolothumtho@nvidia.com>, <bbiber@nvidia.com>,
<harsha.v@oss.qualcomm.com>
Subject: Re: [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU
Date: Wed, 23 Sep 2026 18:12:44 -0700 [thread overview]
Message-ID: <arR5DFw1Jfl9G1o9@nvidia.com> (raw)
In-Reply-To: <179018862539.3334538.4925881940702512638.b4-review@b4>
On Wed, Sep 23, 2026 at 03:37:05PM -0300, Jason Gunthorpe wrote:
> > The EVTQ, PRIQ and combined IRQ handlers are threaded and issue commands of
> > their own, e.g. a CMDQ_OP_PRI_RESP for a page request. Disabling the SMMU
> > while one is in flight hands that command to a queue consuming nothing, so
> > its poll waits out a full timeout.
>
> This seems like a sashiko hallucination?
>
> There are no PRIs during probe. The initial STE table does not permit
> it.
Checked my long rework history. Yes... my bad..
> > Two paths disable the SMMU while those IRQs are still requested: a failing
> > arm_smmu_device_reset() returns to a probe that disables the device itself,
> > and arm_smmu_disable_action() covers an unbind or any later probe failure.
> > Both can run after arm_smmu_setup_irqs() requested the IRQs.
>
> That's fscking devm again. Do not mix devm and non devm CALLS. It
> doesn't work:
>
> ret = arm_smmu_device_reset(smmu);
> if (ret) {
> arm_smmu_device_disable(smmu); <-------------------
> return ret;
> }
>
> /* Register last so it unwinds first, while the CMDQ is still up. */
> ret = devm_add_action_or_reset(smmu->dev, arm_smmu_disable_action, smmu);
> if (ret)
> return ret;
This seems requiring a reorder.
> When devm is devm'ing properly the existing devm irq handlers will be
> torn down before disable_action and we don't need to open code a
> disable_irq
I see. Yes.
> That just leaves shutdown, and I'm not sure how that is supposed to
> work, we can't just halt the SMMU while there are any threads running
> around still poking at it. I forget the context shutdown runs in, but
> if concurrency is shut down already then its fine to not disable the
> irqs.
>
> If not, it doesn't work safely for lots of reasons, and disable_irq is
> not going to fix it enough.
>
> Maybe that is something to tackle after the power management series as
> shutdown is sort of like power down.
OK. Let's leave it.
Thanks
Nicolin
next prev parent reply other threads:[~2026-09-24 1:13 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 16:38 [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-15 23:19 ` Jonathan Cameron
2026-09-15 16:38 ` [PATCH v5 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-23 22:33 ` Nicolin Chen
2026-09-23 23:39 ` Jason Gunthorpe
2026-09-24 1:42 ` Nicolin Chen
2026-09-24 14:03 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-15 23:21 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-24 1:12 ` Nicolin Chen [this message]
2026-09-15 16:38 ` [PATCH v5 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-15 23:22 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=arR5DFw1Jfl9G1o9@nvidia.com \
--to=nicolinc@nvidia.com \
--cc=baolu.lu@linux.intel.com \
--cc=bbiber@nvidia.com \
--cc=bhelgaas@google.com \
--cc=eric.auger@redhat.com \
--cc=harsha.v@oss.qualcomm.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=jonathan.cameron@oss.qualcomm.com \
--cc=joro@8bytes.org \
--cc=jpb@kernel.org \
--cc=kees@kernel.org \
--cc=kevin.tian@intel.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mmarrid@nvidia.com \
--cc=praan@google.com \
--cc=robin.murphy@arm.com \
--cc=skaestle@nvidia.com \
--cc=skolothumtho@nvidia.com \
--cc=smostafa@google.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®