Re: [PATCH 05/10] irqchip/gic-v5: Use linear DT and ITT when L2 covers all IDs

[Lorenzo Pieralisi <lpieralisi@kernel.org>]

On Mon, Nov 02, 2026 at 01:32:58PM +0000, Sascha Bischoff wrote:
> The DT and ITT level selector incorrectly chooses a two-level table
> when the selected L2 table has exactly enough entries to cover the
> full ID space. There are no L1 index bits in this case. ITT allocation
> correctly rejects the layout and device registration fails; the DT
> path instead allocates an unnecessary one-entry L1 table.
> 
> Select a linear DT or ITT when the L2 width equals the ID width.
> 
> Fixes: 57d72196dfc85 ("irqchip/gic-v5: Add GICv5 ITS support")
> Cc: stable@vger.kernel.org
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> ---
>  drivers/irqchip/irq-gic-v5-its.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>

> diff --git a/drivers/irqchip/irq-gic-v5-its.c b/drivers/irqchip/irq-gic-v5-its.c
> index 6d98f3dbe34b6..866c238f08dfe 100644
> --- a/drivers/irqchip/irq-gic-v5-its.c
> +++ b/drivers/irqchip/irq-gic-v5-its.c
> @@ -337,7 +337,7 @@ static bool gicv5_its_l2sz_two_level(bool devtab, u32 its_idr1, u8 id_bits, u8 *
>  
>  	l2_bits = gicv5_its_l2sz_to_l2_bits(l2_sz);
>  
> -	if (l2_bits > id_bits)
> +	if (l2_bits >= id_bits)
>  		return false;
>  
>  	*sz = l2_sz;
> 
> -- 
> 2.34.1
>