[PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[Tiezhu Yang]

The kmalloc_nolock() infrastructure relies on slab caches with double-word
atomic cmpxchg capabilities (__CMPXCHG_DOUBLE). The current inline comment
in __kmalloc_nolock_noprof() uses 'cmpxchg16b' as the prerequisite hardware
capability.

However, "cmpxchg16b" is an x86-specific instruction mnemonic (CX16). On
the modern architectures supported by the Linux kernel, this double-width
atomic primitive is satisfied by different hardware implementations:
(1) arm64: satisfies it via LSE atomics ('casp' instruction)
(2) s390: satisfies it via native 'cdsg' instruction
(3) riscv: satisfies it via ZACAS extension ('amocas.q' instruction)
(4) loongarch: satisfies it via SCQ extension (using an 'll.d'/'sc.q' loop)

Update the comment to "double-width atomic cmpxchg", which provides the
following advantages:
(1) Accurately describes the cross-platform hardware invariant.
(2) Covers both 32-bit and 64-bit platforms.
(3) Aligns well with the __CMPXCHG_DOUBLE flag.
(4) Avoids misleading developers of non-x86 architectures.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
v2:
  - Update "128-bit atomic cmpxchg" to "double-width atomic cmpxchg" to
    properly cover both 32-bit and 64-bit platforms, suggested by Harry.
  - Refine the commit message to format the architecture implementations
    and advantages into structured lists for better readability.

 mm/slub.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/mm/slub.c b/mm/slub.c
index 45e077c7526c..090302f1daeb 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -5589,8 +5589,8 @@ static void *__kmalloc_nolock_noprof(DECL_TOKEN_PARAMS(size, token), gfp_t gfp_f
 	if (!(s->flags & __CMPXCHG_DOUBLE) && !kmem_cache_debug(s))
 		/*
 		 * kmalloc_nolock() is not supported on architectures that
-		 * don't implement cmpxchg16b and thus need slab_lock()
-		 * which could be preempted by a nmi.
+		 * don't implement double-width atomic cmpxchg and thus need
+		 * slab_lock() which could be preempted by a nmi.
 		 * But debug caches don't use that and only rely on
 		 * kmem_cache_node->list_lock, so kmalloc_nolock() can attempt
 		 * to allocate from debug caches by
-- 
2.42.0

Re: [PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[Alexei Starovoitov]

On Sun, Nov 08, 2026 at 07:59 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> atomic primitive is satisfied by different hardware implementations:
> (1) arm64: satisfies it via LSE atomics ('casp' instruction)
[...]
> Update the comment to "double-width atomic cmpxchg", which provides the
> following advantages:
> (1) Accurately describes the cross-platform hardware invariant.

You ignored Hao's point about shorter commit logs.

I dropped all of your pending patches.

pw-bot: cr

Re: [PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[Tiezhu Yang]

On 11/10/26 2:25 AM, Alexei Starovoitov wrote:
> On Sun, Nov 08, 2026 at 07:59 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>> atomic primitive is satisfied by different hardware implementations:
>> (1) arm64: satisfies it via LSE atomics ('casp' instruction)
> [...]
>> Update the comment to "double-width atomic cmpxchg", which provides the
>> following advantages:
>> (1) Accurately describes the cross-platform hardware invariant.
> 
> You ignored Hao's point about shorter commit logs.

If the following shorter commit message is preferred:

   mm/slub: Genericize x86-specific cmpxchg16b comment

   In __kmalloc_nolock_noprof(), update the comment from x86-specific
   "cmpxchg16b" to generic "double-width atomic cmpxchg".

I will wait for a while for more feedback from mm maintainers and send
v3 if necessary.

Thanks,
Tiezhu

Re: [PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[Hao Li]

On Tue, Nov 10, 2026 at 09:29:04AM +0800, Tiezhu Yang wrote:
> On 11/10/26 2:25 AM, Alexei Starovoitov wrote:
> > On Sun, Nov 08, 2026 at 07:59 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> > > atomic primitive is satisfied by different hardware implementations:
> > > (1) arm64: satisfies it via LSE atomics ('casp' instruction)
> > [...]
> > > Update the comment to "double-width atomic cmpxchg", which provides the
> > > following advantages:
> > > (1) Accurately describes the cross-platform hardware invariant.
> > 
> > You ignored Hao's point about shorter commit logs.
> 
> If the following shorter commit message is preferred:
> 
>   mm/slub: Genericize x86-specific cmpxchg16b comment
> 
>   In __kmalloc_nolock_noprof(), update the comment from x86-specific
>   "cmpxchg16b" to generic "double-width atomic cmpxchg".

Ok, LGTM.

> 
> I will wait for a while for more feedback from mm maintainers and send
> v3 if necessary.
> 
> Thanks,
> Tiezhu
> 

Re: [PATCH v2] mm/slub: Genericize x86-specific cmpxchg16b comment

[Harry Yoo]

On Tue, Nov 10, 2026 at 03:05:14PM +0800, Hao Li wrote:
> On Tue, Nov 10, 2026 at 09:29:04AM +0800, Tiezhu Yang wrote:
> > On 11/10/26 2:25 AM, Alexei Starovoitov wrote:
> > > On Sun, Nov 08, 2026 at 07:59 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> > > > atomic primitive is satisfied by different hardware implementations:
> > > > (1) arm64: satisfies it via LSE atomics ('casp' instruction)
> > > [...]
> > > > Update the comment to "double-width atomic cmpxchg", which provides the
> > > > following advantages:
> > > > (1) Accurately describes the cross-platform hardware invariant.
> > > 
> > > You ignored Hao's point about shorter commit logs.
> > 
> > If the following shorter commit message is preferred:
> > 
> >   mm/slub: Genericize x86-specific cmpxchg16b comment
> > 
> >   In __kmalloc_nolock_noprof(), update the comment from x86-specific
> >   "cmpxchg16b" to generic "double-width atomic cmpxchg".
> 
> Ok, LGTM.

Looks good to me too.

> > I will wait for a while for more feedback from mm maintainers and send
> > v3 if necessary.

Please send v3.

> > Thanks,
> > Tiezhu

-- 
Cheers,
Harry / Hyeonggon