[PATCH v5 0/4] dmaengine: zynqmp_dma: Add reset support for Versal Gen2 and Versal Net

[PATCH v5 0/4] dmaengine: zynqmp_dma: Add reset support for Versal Gen2 and Versal Net

[Golla Nagendra]

This series adds per-channel reset support for Versal Gen2 and Versal Net
DMA channels.
 
Patch 1 requires the resets property for Versal Gen2 DMA devices.
 
Patch 2 adds the amd,versal-net-dma-1.0 compatible with
xlnx,zynqmp-dma-1.0 as its fallback and requires the resets property for
Versal Net devices.
 
Patch 3 adds the Versal Net compatible to the driver match table and
introduces match data to identify devices that support per-channel reset.
 
Patch 4 resets each Versal Gen2 and Versal Net DMA channel during probe.
Probe fails if the required reset property is missing or the reset fails.
Legacy SoCs skip the per-channel reset path.
 
Changes in V5:
- Drop the probe-time PM and unrelated IRQ-guard patches; retain only the
  patches required for reset support
- Split the Versal Gen2 reset requirement and Versal Net compatible into
  separate binding patches
 
Changes in V4:
- Patch 1: Use PM_RUNTIME_ACQUIRE_AUTOSUSPEND() instead of
  pm_runtime_resume_and_get(), and fail probe immediately if the guard
  acquire fails. Add zynqmp_dma_probe_pm_put()/_fail()
  helpers so every error path releases the reference and gates the
  clocks without goto-based cleanup, and pair every direct
  zynqmp_dma_runtime_suspend() call with pm_runtime_set_suspended() to
  keep the runtime PM status in sync with the clocks
- Patch 2: Bypass the guard when pm_runtime_get_if_active() returns
  -EINVAL, covering disabled runtime PM and CONFIG_PM=n, so interrupt
  handlers keep servicing interrupts instead of bailing out
- Patch 3: Remove the IS_ENABLED(CONFIG_PM) condition from the guard
  error check, since patch 2 already handles disabled runtime PM and
  CONFIG_PM=n inside the guard itself
- Patch 4: Move the allOf block under the required field
  Add the new compatible string and the resets property in the example
- Patch 5: No change
- Patch 6: No change
 
Changes in V3:
- Patch 1: New patch - split PM usage count fix into a separate patch as
- Patch 2: New patch - add PM_RUNTIME_ACQUIRE_IF_ACTIVE() guard and its
  backing infrastructure to pm_runtime.h
- Patch 3: Use PM_RUNTIME_ACQUIRE_IF_ACTIVE() guard instead of the manual
  pm_runtime_get_if_active()/pm_runtime_put() pair from V2
- Patch 4: Use allOf:if:then: to restrict the resets property per-
  compatible with resets: false for non-matching platforms
  also expand to include amd,versal-net-dma-1.0
- Patch 5: New patch - add amd,versal-net-dma-1.0 compatible to driver
- Patch 6: Introduce has_reset flag in zynqmp_dma_config to gate the
  reset path; PM usage count fix split into patch 1/6

Link to V4:
-----------
https://lore.kernel.org/all/20261009-adma-pm-fix-and-per-channel-reset-v4-0-55f5fe409c55@amd.com/

Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
Golla Nagendra (4):
      dt-bindings: dma: xlnx,zynqmp-dma: Require resets for Versal Gen2
      dt-bindings: dma: xlnx,zynqmp-dma: Add Versal Net compatible
      dmaengine: zynqmp_dma: Add new compatible string for Versal Net
      dmaengine: zynqmp_dma: Add per-channel reset support

 .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml   | 35 +++++++++++++++++-----
 drivers/dma/xilinx/zynqmp_dma.c                    | 18 ++++++++++-
 2 files changed, 45 insertions(+), 8 deletions(-)
---
base-commit: 2576c937f7b442df7de8e39332ff585f08b666b8
change-id: 20261106-adma_per_channel_reset_v5-f826adb1314b

Best regards,
-- 
Golla Nagendra <nagendra.golla@amd.com>

[PATCH v5 1/4] dt-bindings: dma: xlnx,zynqmp-dma: Require resets for Versal Gen2

[Golla Nagendra]

Require the per-channel resets property for Versal Gen2
DMA devices, which expose dedicated reset lines.

Making resets required for Versal Gen2 results in an ABI break, but this
is unavoidable. While the driver works in many scenarios when no other
firmware has used the DMA prior to Linux boot, there is no guarantee the
channel is left in a clean state. In observed error scenarios, a reset is
necessary before Linux can reconfigure the IP after previous use by other
firmware components. Due to configuration differences or the DMA being
left in a bad state, DMA functionality fails when sequential software
components use the channel (e.g., firmware before Linux boot). The channel
can only be cleanly re-configured after a per-channel reset, making it
essential. This ABI break is only applied to Versal Gen2 and where the
per-channel reset capability is available.

Fixes: 36545c6a68b8 ("dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string")
Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
 .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml    | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
index 2da86037ad79..59dec441307e 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
+++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
@@ -16,9 +16,6 @@ maintainers:
   - Harini Katakam <harini.katakam@amd.com>
   - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
 
-allOf:
-  - $ref: ../dma-controller.yaml#
-
 properties:
   "#dma-cells":
     const: 1
@@ -59,6 +56,9 @@ properties:
   power-domains:
     maxItems: 1
 
+  resets:
+    maxItems: 1
+
   dma-coherent: true
 
 required:
@@ -70,6 +70,21 @@ required:
   - clock-names
   - xlnx,bus-width
 
+allOf:
+  - $ref: ../dma-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amd,versal2-dma-1.0
+    then:
+      required:
+        - resets
+    else:
+      properties:
+        resets: false
+
 additionalProperties: false
 
 examples:

-- 
2.43.7

Re: [PATCH v5 1/4] dt-bindings: dma: xlnx,zynqmp-dma: Require resets for Versal Gen2

[Rob Herring (Arm)]

On Fri, 06 Nov 2026 15:40:23 +0530, Golla Nagendra wrote:
> Require the per-channel resets property for Versal Gen2
> DMA devices, which expose dedicated reset lines.
> 
> Making resets required for Versal Gen2 results in an ABI break, but this
> is unavoidable. While the driver works in many scenarios when no other
> firmware has used the DMA prior to Linux boot, there is no guarantee the
> channel is left in a clean state. In observed error scenarios, a reset is
> necessary before Linux can reconfigure the IP after previous use by other
> firmware components. Due to configuration differences or the DMA being
> left in a bad state, DMA functionality fails when sequential software
> components use the channel (e.g., firmware before Linux boot). The channel
> can only be cleanly re-configured after a per-channel reset, making it
> essential. This ABI break is only applied to Versal Gen2 and where the
> per-channel reset capability is available.
> 
> Fixes: 36545c6a68b8 ("dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string")
> Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
> ---
>  .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml    | 21 ++++++++++++++++++---
>  1 file changed, 18 insertions(+), 3 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH v5 2/4] dt-bindings: dma: xlnx,zynqmp-dma: Add Versal Net compatible

[Golla Nagendra]

Add support for the amd,versal-net-dma-1.0 compatible with
xlnx,zynqmp-dma-1.0 as its fallback compatible.

Include the Versal Net compatible in the reset requirements,
making the per-channel resets property mandatory for Versal Net
devices.

Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
 .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml           | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
index 59dec441307e..7efbcf282a14 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
+++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
@@ -21,9 +21,13 @@ properties:
     const: 1
 
   compatible:
-    enum:
-      - amd,versal2-dma-1.0
-      - xlnx,zynqmp-dma-1.0
+    oneOf:
+      - enum:
+          - amd,versal2-dma-1.0
+          - xlnx,zynqmp-dma-1.0
+      - items:
+          - const: amd,versal-net-dma-1.0
+          - const: xlnx,zynqmp-dma-1.0
 
   reg:
     description: memory map for gdma/adma module access
@@ -78,6 +82,7 @@ allOf:
           contains:
             enum:
               - amd,versal2-dma-1.0
+              - amd,versal-net-dma-1.0
     then:
       required:
         - resets
@@ -91,7 +96,7 @@ examples:
   - |
 
     fpd_dma_chan1: dma-controller@fd500000 {
-      compatible = "xlnx,zynqmp-dma-1.0";
+      compatible = "amd,versal-net-dma-1.0", "xlnx,zynqmp-dma-1.0";
       reg = <0xfd500000 0x1000>;
       interrupt-parent = <&gic>;
       interrupts = <0 117 0x4>;
@@ -99,5 +104,6 @@ examples:
       clock-names = "clk_main", "clk_apb";
       clocks = <&zynqmp_clk 19>, <&zynqmp_clk 31>;
       xlnx,bus-width = <128>;
+      resets = <&reset 0>;
       dma-coherent;
     };

-- 
2.43.7

Re: [PATCH v5 2/4] dt-bindings: dma: xlnx,zynqmp-dma: Add Versal Net compatible

[Rob Herring (Arm)]

On Fri, 06 Nov 2026 15:40:24 +0530, Golla Nagendra wrote:
> Add support for the amd,versal-net-dma-1.0 compatible with
> xlnx,zynqmp-dma-1.0 as its fallback compatible.
> 
> Include the Versal Net compatible in the reset requirements,
> making the per-channel resets property mandatory for Versal Net
> devices.
> 
> Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
> ---
>  .../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml           | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

[PATCH v5 3/4] dmaengine: zynqmp_dma: Add new compatible string for Versal Net

[Golla Nagendra]

Versal Net previously used the legacy xlnx,zynqmp-dma-1.0 compatible
string. Add amd,versal-net-dma-1.0 to the of_device_id match table
with SoC-specific match data via versal_net_dma_config.

Introduce a has_reset field in zynqmp_dma_config to indicate whether
the compatible requires a per-channel reset during probe.

Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
 drivers/dma/xilinx/zynqmp_dma.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index 3b7dfa53f972..cb0eb13f9b05 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c
@@ -257,13 +257,20 @@ struct zynqmp_dma_device {
 };
 
 struct zynqmp_dma_config {
+	bool has_reset;
 	u32 offset;
 };
 
 static const struct zynqmp_dma_config versal2_dma_config = {
+	.has_reset = true,
 	.offset = IRQ_REG_OFFSET,
 };
 
+/* offset = 0: Versal Net uses base IRQ register address */
+static const struct zynqmp_dma_config versal_net_dma_config = {
+	.has_reset = true,
+};
+
 static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg,
 				     u64 value)
 {
@@ -1193,6 +1200,7 @@ static void zynqmp_dma_remove(struct platform_device *pdev)
 
 static const struct of_device_id zynqmp_dma_of_match[] = {
 	{ .compatible = "amd,versal2-dma-1.0", .data = &versal2_dma_config },
+	{ .compatible = "amd,versal-net-dma-1.0", .data = &versal_net_dma_config },
 	{ .compatible = "xlnx,zynqmp-dma-1.0", },
 	{}
 };

-- 
2.43.7

Re: [PATCH v5 3/4] dmaengine: zynqmp_dma: Add new compatible string for Versal Net

[Pandey, Radhey Shyam]

On 11/6/2026 3:40 PM, Golla Nagendra wrote:
> Versal Net previously used the legacy xlnx,zynqmp-dma-1.0 compatible
> string. Add amd,versal-net-dma-1.0 to the of_device_id match table
> with SoC-specific match data via versal_net_dma_config.
> 
> Introduce a has_reset field in zynqmp_dma_config to indicate whether
> the compatible requires a per-channel reset during probe.
> 
> Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Thanks!

> ---
>   drivers/dma/xilinx/zynqmp_dma.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
> index 3b7dfa53f972..cb0eb13f9b05 100644
> --- a/drivers/dma/xilinx/zynqmp_dma.c
> +++ b/drivers/dma/xilinx/zynqmp_dma.c
> @@ -257,13 +257,20 @@ struct zynqmp_dma_device {
>   };
>   
>   struct zynqmp_dma_config {
> +	bool has_reset;
>   	u32 offset;
>   };
>   
>   static const struct zynqmp_dma_config versal2_dma_config = {
> +	.has_reset = true,
>   	.offset = IRQ_REG_OFFSET,
>   };
>   
> +/* offset = 0: Versal Net uses base IRQ register address */
> +static const struct zynqmp_dma_config versal_net_dma_config = {
> +	.has_reset = true,
> +};
> +
>   static inline void zynqmp_dma_writeq(struct zynqmp_dma_chan *chan, u32 reg,
>   				     u64 value)
>   {
> @@ -1193,6 +1200,7 @@ static void zynqmp_dma_remove(struct platform_device *pdev)
>   
>   static const struct of_device_id zynqmp_dma_of_match[] = {
>   	{ .compatible = "amd,versal2-dma-1.0", .data = &versal2_dma_config },
> +	{ .compatible = "amd,versal-net-dma-1.0", .data = &versal_net_dma_config },
>   	{ .compatible = "xlnx,zynqmp-dma-1.0", },
>   	{}
>   };
> 

[PATCH v5 4/4] dmaengine: zynqmp_dma: Add per-channel reset support

[Golla Nagendra]

Versal Gen2 and Versal Net expose a dedicated reset line per ZDMA
channel. Trigger a reset pulse during probe using device_reset().

For Versal Net and Versal Gen2, reset is a required DT property, so
probe returns an error if the reset property is missing. For legacy
SoCs, the reset path is skipped.

Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
 drivers/dma/xilinx/zynqmp_dma.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index cb0eb13f9b05..12696fa44c66 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c
@@ -19,6 +19,7 @@
 #include <linux/clk.h>
 #include <linux/io-64-nonatomic-lo-hi.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 
 #include "../dmaengine.h"
 
@@ -937,6 +938,14 @@ static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
 	if (IS_ERR(chan->regs))
 		return PTR_ERR(chan->regs);
 
+	match_data = of_device_get_match_data(&pdev->dev);
+	if (match_data && match_data->has_reset) {
+		err = device_reset(&pdev->dev);
+		if (err)
+			return dev_err_probe(&pdev->dev, err,
+					     "failed to reset channel\n");
+	}
+
 	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
 	chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
 	chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
@@ -952,7 +961,6 @@ static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
 		return -EINVAL;
 	}
 
-	match_data = of_device_get_match_data(&pdev->dev);
 	if (match_data)
 		chan->irq_offset = match_data->offset;
 

-- 
2.43.7

Re: [PATCH v5 4/4] dmaengine: zynqmp_dma: Add per-channel reset support

[Pandey, Radhey Shyam]

On 11/6/2026 3:40 PM, Golla Nagendra wrote:
> Versal Gen2 and Versal Net expose a dedicated reset line per ZDMA
> channel. Trigger a reset pulse during probe using device_reset().
> 
> For Versal Net and Versal Gen2, reset is a required DT property, so
> probe returns an error if the reset property is missing. For legacy
> SoCs, the reset path is skipped.
> 
> Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Thanks!

> ---
>   drivers/dma/xilinx/zynqmp_dma.c | 10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
> index cb0eb13f9b05..12696fa44c66 100644
> --- a/drivers/dma/xilinx/zynqmp_dma.c
> +++ b/drivers/dma/xilinx/zynqmp_dma.c
> @@ -19,6 +19,7 @@
>   #include <linux/clk.h>
>   #include <linux/io-64-nonatomic-lo-hi.h>
>   #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
>   
>   #include "../dmaengine.h"
>   
> @@ -937,6 +938,14 @@ static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
>   	if (IS_ERR(chan->regs))
>   		return PTR_ERR(chan->regs);
>   
> +	match_data = of_device_get_match_data(&pdev->dev);
> +	if (match_data && match_data->has_reset) {
> +		err = device_reset(&pdev->dev);
> +		if (err)
> +			return dev_err_probe(&pdev->dev, err,
> +					     "failed to reset channel\n");
> +	}
> +
>   	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
>   	chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
>   	chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
> @@ -952,7 +961,6 @@ static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
>   		return -EINVAL;
>   	}
>   
> -	match_data = of_device_get_match_data(&pdev->dev);
>   	if (match_data)
>   		chan->irq_offset = match_data->offset;
>   
>