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From: Fenghua Yu <fenghua.yu@intel.com>
To: Reinette Chatre <reinette.chatre@intel.com>, <babu.moger@amd.com>,
	"Maciej Wieczor-Retman" <maciej.wieczor-retman@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Jonathan Corbet <corbet@lwn.net>
Cc: <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>
Subject: Re: [PATCH v2 3/4] Documentation/x86: Document resctrl's new sparse_masks
Date: Wed, 27 Sep 2023 16:02:06 -0700	[thread overview]
Message-ID: <c5ddb511-cc14-34f8-dd80-6471a9a72a81@intel.com> (raw)
In-Reply-To: <bced7bc7-c489-7a57-374f-62818cbfded6@intel.com>



On 9/27/23 15:58, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/27/2023 3:47 PM, Moger, Babu wrote:
>> On 9/22/2023 3:48 AM, Maciej Wieczor-Retman wrote:
>>> From: Fenghua Yu <fenghua.yu@intel.com>
>>>
>>> The documentation mentions that non-contiguous bit masks are not
>>> supported in Intel Cache Allocation Technology (CAT).
>>>
>>> Update the documentation on how to determine if sparse bit masks are
>>> allowed in L2 and L3 CAT.
>>>
>>> Mention the file with feature support information is located in
>>> the /sys/fs/resctrl/info/{resource}/ directories and enumerate what
>>> are the possible outputs on file read operation.
>>>
>>> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
>>> Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
>>> ---
>>> Changelog v2:
>>> - Change bitmap naming convention to bit mask. (Reinette)
>>>
>>>    Documentation/arch/x86/resctrl.rst | 16 ++++++++++++----
>>>    1 file changed, 12 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst
>>> index cb05d90111b4..4c6421e2aa31 100644
>>> --- a/Documentation/arch/x86/resctrl.rst
>>> +++ b/Documentation/arch/x86/resctrl.rst
>>> @@ -124,6 +124,13 @@ related to allocation:
>>>                "P":
>>>                      Corresponding region is pseudo-locked. No
>>>                      sharing allowed.
>>> +"sparse_masks":
>>> +        Indicates if non-contiguous 1s value in CBM is supported.
>>> +
>>> +            "0":
>>> +                  Only contiguous 1s value in CBM is supported.
>>
>> This is little confusing. How about?
>>
>> Non-contiguous 1s value in CBM is not supported
>>
> 
> It is not clear to me how changing it to a double
> negative reduces confusion.
Agree with Reinette.

The original statement is clearer and more direct to explicitly state 
what is supported without introducing a negative assertion (not supported).

Thanks.

-Fenghua

  reply	other threads:[~2023-09-27 23:02 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-22  8:47 [PATCH v2 0/4] x86/resctrl: Non-contiguous bitmasks in Intel CAT Maciej Wieczor-Retman
2023-09-22  8:48 ` [PATCH v2 1/4] x86/resctrl: Enable non-contiguous bits " Maciej Wieczor-Retman
2023-09-22 14:14   ` Peter Newman
2023-09-27  9:20     ` Maciej Wieczór-Retman
2023-09-27 10:08       ` Peter Newman
2023-09-27 10:44         ` Maciej Wieczór-Retman
2023-09-27 15:03           ` Tony Luck
2023-09-27 22:34   ` Moger, Babu
2023-09-28  7:06     ` Maciej Wieczór-Retman
2023-09-28 15:08       ` Moger, Babu
2023-09-28 15:53         ` Reinette Chatre
2023-09-28 16:28           ` Moger, Babu
2023-09-22  8:48 ` [PATCH v2 2/4] x86/resctrl: Add sparse_masks file in info Maciej Wieczor-Retman
2023-09-28 20:47   ` Reinette Chatre
2023-09-29  6:22     ` Maciej Wieczór-Retman
2023-09-22  8:48 ` [PATCH v2 3/4] Documentation/x86: Document resctrl's new sparse_masks Maciej Wieczor-Retman
2023-09-27 22:47   ` Moger, Babu
2023-09-27 22:58     ` Reinette Chatre
2023-09-27 23:02       ` Fenghua Yu [this message]
2023-09-28 13:59         ` Moger, Babu
2023-09-22  8:48 ` [PATCH v2 4/4] x86/resctrl: Rename arch_has_sparse_bitmaps Maciej Wieczor-Retman
2023-09-28 20:47   ` Reinette Chatre
2023-09-29  6:20     ` Maciej Wieczór-Retman

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