From: Krzysztof Kozlowski <krzk@kernel.org>
To: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Cc: Bryan O'Donoghue <bod@kernel.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Suresh Vankadara <svankada@qti.qualcomm.com>,
Vikram Sharma <vikram.sharma@oss.qualcomm.com>
Subject: Re: [PATCH 1/2] dt-bindings: media: qcom,glymur-camss: Use CSIPHY indices for ports
Date: Thu, 5 Nov 2026 10:23:12 +0100 [thread overview]
Message-ID: <d586b7b3-675d-48a8-b0d4-564e571ef69f@kernel.org> (raw)
In-Reply-To: <539842db-c672-4549-b861-4a6f3be47556@oss.qualcomm.com>
On 05/11/2026 10:18, Nihal Kumar Gupta wrote:
>
>
> On 05-11-2026 13:03, Krzysztof Kozlowski wrote:
>>>> What is the problem exactly you are solving?
>>>>
>>> The problem is that CSIPHY4 is connected to CAMSS interface 4, so the
>>> graph should describe it as port@4, not port@2.
>> Nothing like this is explained in commit msg.
>>
> I will update commit message to explain it better.
>
>>> The previous port@3 description only worked through the X1E80100 resource
>>> table indirection:
>>>
>>> port@3 -> csiphy_res[3] -> .csiphy.id = 4 -> CSID selects CSIPHY4
>>>
>>> New standalone PHY path:
>>> port@4 -> no csiphy_res[] lookup -> port number is id 4 -> CSID selects CSIPHY4
>> Then this breaks existing users, no? Anyway, what stops you from having
>> there proper mapping?
>>
> No existing upstream user should break here; this is still part of the Glymur
> CAMSS enablement.
>
> This follows the earlier discussion that CSIPHY4 should use the
> CAMSS-side interface index as its graph port number:
>
> https://lore.kernel.org/all/CAFEp6-23L+4+yzVxX815ZA2x1_tN8SpzL7ciNcb9b+gBT67AdQ@mail.gmail.com/
Should use? Since when? Do you have DT maintainers ack on that?
>
>> Did you find any existing practice of numbering ports logical numbering
>> in this device, but some other logic coming from datasheet? Where?
>>
>
> Glymur has only CSIPHY0, CSIPHY1 and CSIPHY4; CSIPHY2 and CSIPHY3 are not
> present on the SoC.
Then CSIPHY4 is basically the third (so @2 counting from 0) input port,
no? Not fifth.
>
> Using port@2 for CSIPHY4 would require a Glymur-specific port-to-CSIPHY mapping.
> port@4 describes the CAMSS input directly and avoids introducing separate logical
> numbering for Glymur.
Seems you opened a new can of worms, so this needs proper justification.
Again, do you see any recent preexisting DT review which would help to
convince me? I know I usually ask not to use poor existing code as
reason to do the same, but here I actually want to see proofs of current
accepted practice.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-11-05 9:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 8:50 [PATCH 0/2] media: qcom: camss: Use Glymur graph ports as CSIPHY IDs Nihal Kumar Gupta
2026-11-02 8:50 ` [PATCH 1/2] dt-bindings: media: qcom,glymur-camss: Use CSIPHY indices for ports Nihal Kumar Gupta
2026-11-04 13:52 ` Krzysztof Kozlowski
2026-11-04 16:00 ` Nihal Kumar Gupta
2026-11-04 16:12 ` Krzysztof Kozlowski
2026-11-05 5:32 ` Nihal Kumar Gupta
2026-11-05 7:33 ` Krzysztof Kozlowski
2026-11-05 9:18 ` Nihal Kumar Gupta
2026-11-05 9:23 ` Krzysztof Kozlowski [this message]
2026-11-05 9:53 ` Loic Poulain
2026-11-05 10:15 ` Bryan O'Donoghue
2026-11-05 10:45 ` Krzysztof Kozlowski
2026-11-05 11:03 ` Bryan O'Donoghue
2026-11-05 12:04 ` Loic Poulain
2026-11-05 13:21 ` Krzysztof Kozlowski
2026-11-02 8:50 ` [PATCH 2/2] media: qcom: camss: Add Glymur specific resources Nihal Kumar Gupta
2026-11-04 13:54 ` Krzysztof Kozlowski
2026-11-04 16:01 ` Nihal Kumar Gupta
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