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From: Rahul Tanwar <rtanwar@maxlinear.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "bigeasy@linutronix.de" <bigeasy@linutronix.de>,
	"robh@kernel.org" <robh@kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>, "x86@kernel.org" <x86@kernel.org>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-lgm-soc <linux-lgm-soc@maxlinear.com>
Subject: Re: [PATCH v3 4/4] x86/of: Add support for boot time interrupt delivery mode configuration
Date: Tue, 22 Nov 2022 09:45:29 +0000	[thread overview]
Message-ID: <e5028335-97f9-dd88-09e9-9036b55e7642@maxlinear.com> (raw)
In-Reply-To: <Y3yS6fCIl+0nsbOj@smile.fi.intel.com>

On 22/11/2022 5:14 pm, Andy Shevchenko wrote:
> This email was sent from outside of MaxLinear.
> 
> 
> On Tue, Nov 22, 2022 at 03:39:10PM +0800, Rahul Tanwar wrote:
>> Presently, init/boot time interrupt delivery mode is enumerated
>> only for ACPI enabled systems by parsing MADT table or for older
>> systems by parsing MP table. But for OF based x86 systems, it is
>> assumed & hardcoded to legacy PIC mode. This is a bug for
>> platforms which are OF based but do not use 8259 compliant legacy
>> PIC interrupt controller. Such platforms can not even boot because
>> of this bug/hardcoding.
>>
>> Fix this bug by adding support for configuration of init time
>> interrupt delivery mode for x86 OF based systems by introducing a
>> new optional boolean property 'intel,virtual-wire-mode' for
>> interrupt-controller node of local APIC. This property emulates
>> IMCRP Bit 7 of MP feature info byte 2 of MP floating pointer
>> structure.
>>
>> Defaults to legacy PIC mode if absent. Configures it to virtual
>> wire compatibility mode if present.
> 
>> Fixes: 3879a6f32948 ("x86: dtb: Add early parsing of IO_APIC")
> 
> If it was never working, there is nothing to fix.
> OTOH, without Cc: stable@ this is up to stable maintainers to
> backport.
>

Agree, will remove fixes tag..


> 
>> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> 
> I definitely haven't suggested this fix.
> 

Yes, i copy pasted to entire series. I will remove it from this patch.

> ...
> 
> The code looks good to me.
>

Thanks.

Regards,
Rahul


> --
> With Best Regards,
> Andy Shevchenko
> 
> 
> 


  reply	other threads:[~2022-11-22  9:46 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-22  7:39 [PATCH v3 0/4] x86/of: Fix a bug in x86 arch OF support Rahul Tanwar
2022-11-22  7:39 ` [PATCH v3 1/4] x86/of: Convert Intel's APIC bindings to YAML schema Rahul Tanwar
2022-11-22  9:10   ` Andy Shevchenko
2022-11-22  9:43     ` Rahul Tanwar
2022-11-22 10:09       ` Andy Shevchenko
2022-11-22 10:37         ` Rahul Tanwar
2022-11-23 16:02   ` Krzysztof Kozlowski
2022-11-23 17:24     ` Andy Shevchenko
2022-11-24  8:33     ` Rahul Tanwar
2022-11-22  7:39 ` [PATCH v3 2/4] x86/of: Introduce new optional bool property for lapic Rahul Tanwar
2022-11-22  7:39 ` [PATCH v3 3/4] x86/of: Replace printk(KERN_LVL) with pr_lvl() Rahul Tanwar
2022-11-22  9:14   ` Andy Shevchenko
2022-11-22  7:39 ` [PATCH v3 4/4] x86/of: Add support for boot time interrupt delivery mode configuration Rahul Tanwar
2022-11-22  9:14   ` Andy Shevchenko
2022-11-22  9:45     ` Rahul Tanwar [this message]
2022-11-22 10:10       ` Andy Shevchenko
2022-11-22  9:17 ` [PATCH v3 0/4] x86/of: Fix a bug in x86 arch OF support Andy Shevchenko
2022-11-22  9:49   ` Rahul Tanwar
2022-11-22 10:14     ` Andy Shevchenko
2022-11-22 10:45       ` Rahul Tanwar
2022-11-22 12:42         ` Andy Shevchenko
2022-11-23  9:52           ` Rahul Tanwar
2022-11-23 13:47             ` Andy Shevchenko

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