From: Rahul Tanwar <rtanwar@maxlinear.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "bigeasy@linutronix.de" <bigeasy@linutronix.de>,
"robh@kernel.org" <robh@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>, "x86@kernel.org" <x86@kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-lgm-soc <linux-lgm-soc@maxlinear.com>
Subject: Re: [PATCH v3 1/4] x86/of: Convert Intel's APIC bindings to YAML schema
Date: Tue, 22 Nov 2022 10:37:50 +0000 [thread overview]
Message-ID: <e63306e0-8cc1-56c5-3600-e95ce4fbd335@maxlinear.com> (raw)
In-Reply-To: <Y3yf2OWt6nE4xVVi@smile.fi.intel.com>
On 22/11/2022 6:09 pm, Andy Shevchenko wrote:
> This email was sent from outside of MaxLinear.
>
>
> On Tue, Nov 22, 2022 at 09:43:12AM +0000, Rahul Tanwar wrote:
>> On 22/11/2022 5:11 pm, Andy Shevchenko wrote:
>>> On Tue, Nov 22, 2022 at 03:39:07PM +0800, Rahul Tanwar wrote:
>
> ...
>
>>> > + first appeared in CE4100 SoC. See bindings/x86/ce4100.txt for more
>>>
>>> Shouldn't you change this?
>>
>> Do you mean change compatibility property prefix from
>> "intel,ce4100-ioapic" to "intel,ioapic"? If yes, then i totally agree
>> and i will change it (including new file names & all other references to
>> ce4100). If not, please clarify more..
>
> I specifically emphasized a single line (by putting blank lines around).
> For your convenience I removed the unneeded parts of the context, so you can
> see better what I meant.
>
Got it. I will remove the mention of "See bindings/x86/ce4100.txt" from
here.
> ...
>
>>> > + first appeared in CE4100 SoC. See bindings/x86/ce4100.txt for more
>
>
> Ditto.
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
>
next prev parent reply other threads:[~2022-11-22 10:44 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-22 7:39 [PATCH v3 0/4] x86/of: Fix a bug in x86 arch OF support Rahul Tanwar
2022-11-22 7:39 ` [PATCH v3 1/4] x86/of: Convert Intel's APIC bindings to YAML schema Rahul Tanwar
2022-11-22 9:10 ` Andy Shevchenko
2022-11-22 9:43 ` Rahul Tanwar
2022-11-22 10:09 ` Andy Shevchenko
2022-11-22 10:37 ` Rahul Tanwar [this message]
2022-11-23 16:02 ` Krzysztof Kozlowski
2022-11-23 17:24 ` Andy Shevchenko
2022-11-24 8:33 ` Rahul Tanwar
2022-11-22 7:39 ` [PATCH v3 2/4] x86/of: Introduce new optional bool property for lapic Rahul Tanwar
2022-11-22 7:39 ` [PATCH v3 3/4] x86/of: Replace printk(KERN_LVL) with pr_lvl() Rahul Tanwar
2022-11-22 9:14 ` Andy Shevchenko
2022-11-22 7:39 ` [PATCH v3 4/4] x86/of: Add support for boot time interrupt delivery mode configuration Rahul Tanwar
2022-11-22 9:14 ` Andy Shevchenko
2022-11-22 9:45 ` Rahul Tanwar
2022-11-22 10:10 ` Andy Shevchenko
2022-11-22 9:17 ` [PATCH v3 0/4] x86/of: Fix a bug in x86 arch OF support Andy Shevchenko
2022-11-22 9:49 ` Rahul Tanwar
2022-11-22 10:14 ` Andy Shevchenko
2022-11-22 10:45 ` Rahul Tanwar
2022-11-22 12:42 ` Andy Shevchenko
2022-11-23 9:52 ` Rahul Tanwar
2022-11-23 13:47 ` Andy Shevchenko
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