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* [PATCH] clk: sprd: Fix thm_parents incorrect configuration
@ 2023-08-05  6:48 Zhifeng Tang
  2023-08-24  2:02 ` Chunyan Zhang
  2023-08-24  2:29 ` Baolin Wang
  0 siblings, 2 replies; 3+ messages in thread
From: Zhifeng Tang @ 2023-08-05  6:48 UTC (permalink / raw)
  To: Michael Turquette, Stephen Boyd, Orson Zhai, Baolin Wang,
	Chunyan Zhang, Zhifeng Tang, Cixi Geng
  Cc: linux-clk, linux-kernel, Zhifeng Tang, Wenming Wu

The thm*_clk have two clock sources 32k and 250k,excluding 32m.

Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com>
---
 drivers/clk/sprd/ums512-clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/sprd/ums512-clk.c b/drivers/clk/sprd/ums512-clk.c
index fc25bdd85e4e..f43bb10bd5ae 100644
--- a/drivers/clk/sprd/ums512-clk.c
+++ b/drivers/clk/sprd/ums512-clk.c
@@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents,
 			 0x250, 0, 3, UMS512_MUX_FLAG);
 
 static const struct clk_parent_data thm_parents[] = {
-	{ .fw_name = "ext-32m" },
+	{ .fw_name = "ext-32k" },
 	{ .hw = &clk_250k.hw  },
 };
 static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-08-24  2:30 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2023-08-05  6:48 [PATCH] clk: sprd: Fix thm_parents incorrect configuration Zhifeng Tang
2023-08-24  2:02 ` Chunyan Zhang
2023-08-24  2:29 ` Baolin Wang

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