mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "Jürgen Groß" <jgross@suse.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	virtualization@lists.linux.dev, xin@zytor.com,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Ajay Kaher <ajay.kaher@broadcom.com>,
	Alexey Makhalov <alexey.makhalov@broadcom.com>,
	Broadcom internal kernel review list
	<bcm-kernel-feedback-list@broadcom.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 11/12] x86/paravirt: Don't use pv_ops vector for MSR access functions
Date: Tue, 30 Sep 2025 12:43:24 +0200	[thread overview]
Message-ID: <fefbd1ee-ab8c-465e-89bf-39cd2601fc60@suse.com> (raw)
In-Reply-To: <20250930100404.GK4067720@noisy.programming.kicks-ass.net>


[-- Attachment #1.1.1: Type: text/plain, Size: 4626 bytes --]

On 30.09.25 12:04, Peter Zijlstra wrote:
> On Tue, Sep 30, 2025 at 11:02:52AM +0200, Jürgen Groß wrote:
>> On 30.09.25 10:38, Peter Zijlstra wrote:
>>> On Tue, Sep 30, 2025 at 09:03:55AM +0200, Juergen Gross wrote:
>>>
>>>> +static __always_inline u64 read_msr(u32 msr)
>>>> +{
>>>> +	if (cpu_feature_enabled(X86_FEATURE_XENPV))
>>>> +		return xen_read_msr(msr);
>>>> +
>>>> +	return native_rdmsrq(msr);
>>>> +}
>>>> +
>>>> +static __always_inline int read_msr_safe(u32 msr, u64 *p)
>>>> +{
>>>> +	if (cpu_feature_enabled(X86_FEATURE_XENPV))
>>>> +		return xen_read_msr_safe(msr, p);
>>>> +
>>>> +	return native_read_msr_safe(msr, p);
>>>> +}
>>>> +
>>>> +static __always_inline void write_msr(u32 msr, u64 val)
>>>> +{
>>>> +	if (cpu_feature_enabled(X86_FEATURE_XENPV))
>>>> +		xen_write_msr(msr, val);
>>>> +	else
>>>> +		native_wrmsrq(msr, val);
>>>> +}
>>>> +
>>>> +static __always_inline int write_msr_safe(u32 msr, u64 val)
>>>> +{
>>>> +	if (cpu_feature_enabled(X86_FEATURE_XENPV))
>>>> +		return xen_write_msr_safe(msr, val);
>>>> +
>>>> +	return native_write_msr_safe(msr, val);
>>>> +}
>>>> +
>>>> +static __always_inline u64 rdpmc(int counter)
>>>> +{
>>>> +	if (cpu_feature_enabled(X86_FEATURE_XENPV))
>>>> +		return xen_read_pmc(counter);
>>>> +
>>>> +	return native_read_pmc(counter);
>>>> +}
>>>
>>> Egads, didn't we just construct giant ALTERNATIVE()s for the native_
>>> things? Why wrap that in a cpu_feature_enabled() instead of just adding
>>> one more case to the ALTERNATIVE() ?
>>
>> The problem I encountered with using pv_ops was to implement the *_safe()
>> variants. There is no simple way to do that using ALTERNATIVE_<n>(), as
>> in the Xen PV case the call will remain, and I didn't find a way to
>> specify a sane interface between the call-site and the called Xen function
>> to return the error indicator. Remember that at the call site the main
>> interface is the one of the RDMSR/WRMSR instructions. They lack an error
>> indicator.
> 
> Would've been useful Changelog material that I suppose.
> 
>> In Xin's series there was a patch written initially by you to solve such
>> a problem by adding the _ASM_EXTABLE_FUNC_REWIND() exception table method.
>> I think this is a dead end, as it will break when using a shadow stack.
> 
> No memories, let me go search. I found this:
> 
>    https://patchwork.ozlabs.org/project/linux-ide/patch/20250331082251.3171276-12-xin@zytor.com/
> 
> That's the other Peter :-)

Oh, my bad, sorry. :-)

> Anyway, with shadowstack you should be able to frob SSP along with SP in
> the exception context. IIRC the SSP 'return' value is on the SS itself,
> so a WRSS to that field can easily make the whole CALL go away.

Yeah, but being able to avoid all of that dance wouldn't be too bad either.

>> Additionally I found a rather ugly hack only to avoid re-iterating most of
>> the bare metal ALTERNATIVE() for the paravirt case. It is possible, but the
>> bare metal case is gaining one additional ALTERNATIVE level, resulting in
>> patching the original instruction with an identical copy first.
> 
> OTOH the above generates atrocious crap code :/

Yes.

> You get that _static_cpu_has() crud, which is basically a really fat
> jump_label (because it needs to include the runtime test) and then the
> code for both your xen thing and the alternative.

Seeing both variants would make it easier to decide, I guess.

> 
> /me ponders things a bit..
> 
>> Remember that at the call site the main interface is the one of the
>> RDMSR/WRMSR instructions. They lack an error indicator.
> 
> This, that isn't true.
> 
> Note how ex_handler_msr() takes a reg argument and how that sets that
> reg to -EIO. See how the current native_read_msr_safe() uses that:
> 
>    _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
> 
> (also note how using _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_*_SAFE) like you
> do, will result in reg being 0 or ax. Scribbling your 0 return value)
> 
> It very explicitly uses @err as error return value. So your call would
> return eax:edx and take ecx to be the msr, but there is nothing stopping
> us from then using say ebx for error return, like:
> 
> 	int err = 0;
> 
> 	asm_inline(
> 		"1:\n"
> 		ALTERNATIVE("ds rdmsr",
> 			    "call xen_rdmsr", XENPV)
> 		"2:\n"
> 
> 		_ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %%ebx)
> 
> 		: "a" (ax), "d" (dx), "+b" (err)
> 		: "c" (msr));
> 
> 	return err;
> 
> Hmm?

Oh, indeed.

Let me try that and we can choose the less evil. :-)


Juergen

[-- Attachment #1.1.2: OpenPGP public key --]
[-- Type: application/pgp-keys, Size: 3743 bytes --]

[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 495 bytes --]

  reply	other threads:[~2025-09-30 10:43 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-30  7:03 [PATCH v2 00/12] x86/msr: Inline rdmsr/wrmsr instructions Juergen Gross
2025-09-30  7:03 ` [PATCH v2 01/12] coco/tdx: Rename MSR access helpers Juergen Gross
2025-09-30  9:07   ` Kiryl Shutsemau
2025-09-30  7:03 ` [PATCH v2 02/12] x86/sev: Replace call of native_wrmsr() with native_wrmsrq() Juergen Gross
2025-10-07  6:08   ` Nikunj A Dadhania
2025-09-30  7:03 ` [PATCH v2 03/12] x86/kvm: Remove the KVM private read_msr() function Juergen Gross
2025-09-30 16:04   ` Sean Christopherson
2025-10-01  9:14     ` Jürgen Groß
2025-09-30  7:03 ` [PATCH v2 04/12] x86/msr: Minimize usage of native_*() msr access functions Juergen Gross
2025-09-30  7:03 ` [PATCH v2 05/12] x86/msr: Move MSR trace calls one function level up Juergen Gross
2025-09-30  7:03 ` [PATCH v2 06/12] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions Juergen Gross
2025-09-30  7:03 ` [PATCH v2 07/12] x86/opcode: Add immediate form MSR instructions Juergen Gross
2025-09-30  7:03 ` [PATCH v2 08/12] x86/extable: Add support for " Juergen Gross
2025-09-30  8:14   ` Peter Zijlstra
2025-09-30  8:31     ` Jürgen Groß
2025-09-30  7:03 ` [PATCH v2 09/12] x86/msr: Use the alternatives mechanism for WRMSR Juergen Gross
2025-09-30  8:31   ` Peter Zijlstra
2025-09-30  8:46     ` Jürgen Groß
2025-09-30  8:50       ` Peter Zijlstra
2025-09-30 12:51         ` Peter Zijlstra
2025-09-30 15:42           ` Jürgen Groß
2025-10-01  6:43             ` Peter Zijlstra
2025-10-01  7:23               ` Peter Zijlstra
2025-10-03 14:23                 ` Dave Hansen
2025-10-03 16:53                   ` H. Peter Anvin
2025-10-01  8:49       ` Juergen Gross
2025-10-01 10:50         ` Peter Zijlstra
2025-10-01 11:16           ` Jürgen Groß
2025-09-30 16:00   ` Sean Christopherson
2025-10-01  9:13     ` Jürgen Groß
2025-09-30  7:03 ` [PATCH v2 10/12] x86/msr: Use the alternatives mechanism for RDMSR Juergen Gross
2025-09-30  7:03 ` [PATCH v2 11/12] x86/paravirt: Don't use pv_ops vector for MSR access functions Juergen Gross
2025-09-30  8:38   ` Peter Zijlstra
2025-09-30  9:02     ` Jürgen Groß
2025-09-30 10:04       ` Peter Zijlstra
2025-09-30 10:43         ` Jürgen Groß [this message]
2025-09-30 19:49           ` H. Peter Anvin
2025-09-30 19:59             ` H. Peter Anvin
2025-10-01  6:45             ` Peter Zijlstra
2025-09-30 21:27   ` kernel test robot
2025-10-01  5:48     ` Jürgen Groß
2025-09-30  7:03 ` [PATCH v2 12/12] x86/msr: Reduce number of low level MSR access helpers Juergen Gross
2025-09-30 19:19 ` [PATCH v2 00/12] x86/msr: Inline rdmsr/wrmsr instructions H. Peter Anvin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fefbd1ee-ab8c-465e-89bf-39cd2601fc60@suse.com \
    --to=jgross@suse.com \
    --cc=ajay.kaher@broadcom.com \
    --cc=alexey.makhalov@broadcom.com \
    --cc=bcm-kernel-feedback-list@broadcom.com \
    --cc=boris.ostrovsky@oracle.com \
    --cc=bp@alien8.de \
    --cc=dave.hansen@linux.intel.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=tglx@linutronix.de \
    --cc=virtualization@lists.linux.dev \
    --cc=x86@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    --cc=xin@zytor.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®