[PATCH v3 0/2] Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

[PATCH v3 0/2] Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

[Vikas C Sajjan]

The platforms which support only IOAPIC mode and whose SCI INT >= 16,
pass SCI INT via FADT and not via MADT int src override structure.
In such cases current logic fails to handle it and throws error
"Invalid bus_irq %u for legacy override". This patch handles the above
mentioned case. While at it, also modify function mp_override_legacy_irq()
to use the newly introduced function mp_register_ioapic_irq().

This series is rebased on 'master' branch of
https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git

Changes since v2:
Addressed the review comments by Thomas Gleixner <tglx@linutronix.de> to fix the
broken Signed-off-by chain, code clean up and some comments removal.

Changes since v1:
Patch is split into 2, separating actual fix and code cleanup
as suggested by Rafael.


Vikas C Sajjan (2):
  acpi/x86: Fix improper handling of SCI INT for platforms supporting
    only IOAPIC mode
  acpi/x86: Reuse the mp_register_ioapic_irq() in the function
    mp_override_legacy_irq()

 arch/x86/kernel/acpi/boot.c | 61 ++++++++++++++++++++++++++++-----------------
 1 file changed, 38 insertions(+), 23 deletions(-)

-- 
1.9.1

[PATCH v3 1/2] acpi/x86: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

[Vikas C Sajjan]

The platforms which support only IOAPIC mode, pass the SCI information
above the legacy space (0-15) via the FADT mechanism and not via MADT.
In such cases the mp_override_legacy_irq() used by acpi_sci_ioapic_setup()
to register SCI interrupts fails for interrupts >= 16, since it is meant to
handle only legacy space and throws error "Invalid bus_irq %u for legacy
override". Hence add a new function to handle SCI interrupts >= 16 and
invoke it conditionally in acpi_sci_ioapic_setup().The code duplication
due to this new function will be cleaned up in a separate patch.

Co-developed-by: Sunil V L <sunil.vl@hpe.com>
Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Tested-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
---
 arch/x86/kernel/acpi/boot.c | 34 +++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index ef9e02e..7615379 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -429,6 +429,34 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
 	return 0;
 }
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi)
+{
+	struct mpc_intsrc mp_irq;
+	int ioapic, pin;
+
+	/* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
+	ioapic = mp_find_ioapic(gsi);
+	if (ioapic < 0) {
+		pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
+		return ioapic;
+	}
+
+	pin = mp_find_ioapic_pin(ioapic, gsi);
+
+	mp_irq.type = MP_INTSRC;
+	mp_irq.irqtype = mp_INT;
+	mp_irq.irqflag = (trigger << 2) | polarity;
+	mp_irq.srcbus = MP_ISA_BUS;
+	mp_irq.srcbusirq = bus_irq;
+	mp_irq.dstapic = mpc_ioapic_id(ioapic);
+	mp_irq.dstirq = pin;
+
+	mp_save_irq(&mp_irq);
+
+	return 0;
+}
+
 static int __init
 acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
 {
@@ -473,7 +501,11 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger,
 	if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
 		polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
 
-	mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	if (bus_irq < NR_IRQS_LEGACY)
+		mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	else
+		mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
+
 	acpi_penalize_sci_irq(bus_irq, trigger, polarity);
 
 	/*
-- 
1.9.1

Re: [PATCH v3 1/2] acpi/x86: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

[Thomas Gleixner]

On Thu, 16 Nov 2017, Vikas C Sajjan wrote:

> The platforms which support only IOAPIC mode, pass the SCI information
> above the legacy space (0-15) via the FADT mechanism and not via MADT.
> In such cases the mp_override_legacy_irq() used by acpi_sci_ioapic_setup()
> to register SCI interrupts fails for interrupts >= 16, since it is meant to
> handle only legacy space and throws error "Invalid bus_irq %u for legacy
> override". Hence add a new function to handle SCI interrupts >= 16 and
> invoke it conditionally in acpi_sci_ioapic_setup().The code duplication
> due to this new function will be cleaned up in a separate patch.

This reads way better, but I have a small nit pick. In the example I gave
you there were multiple paragraphs on purpose to separate the different
parts. So if I just split the above lump into separate paragraphs:

[1]
   The platforms which support only IOAPIC mode, pass the SCI information
   above the legacy space (0-15) via the FADT mechanism and not via MADT.

[2]
   In such cases the mp_override_legacy_irq() used by acpi_sci_ioapic_setup()
   to register SCI interrupts fails for interrupts >= 16, since it is meant to
   handle only legacy space and throws error "Invalid bus_irq %u for legacy
   override".

[3]
   Hence add a new function to handle SCI interrupts >= 16 and
   invoke it conditionally in acpi_sci_ioapic_setup().

[4]
   The code duplication due to this new function will be cleaned up in a
   separate patch.

then this is clearly structured:

[1] describes the context.

[2] describes the failure

[3] describes the solution

[4] is an extra note to tell the reviewer/reader that you are aware of the
    code duplication and this is addressed later. 

No need to resend. I can do that when picking it up.

> Co-developed-by: Sunil V L <sunil.vl@hpe.com>

I had a discussion with Greg about this tag which resulted in a patch so
it should be soon part of the official documentation:

 https://lkml.kernel.org/r/20171116132309.GA8449@kroah.com

We agreed that both authors should add their Signed-off-by to document that
the work conforms with the Developer Certificate of Origin. I'll add that
if that's ok for you.

Thanks for following up!

       tglx

RE: [PATCH v3 1/2] acpi/x86: Fix improper handling of SCI INT for platforms supporting only IOAPIC mode

[Sajjan, Vikas C]

On Thu, 16 Nov 2017, Vikas C Sajjan wrote:

> The platforms which support only IOAPIC mode, pass the SCI information 
> above the legacy space (0-15) via the FADT mechanism and not via MADT.
> In such cases the mp_override_legacy_irq() used by 
> acpi_sci_ioapic_setup() to register SCI interrupts fails for 
> interrupts >= 16, since it is meant to handle only legacy space and 
> throws error "Invalid bus_irq %u for legacy override". Hence add a new 
> function to handle SCI interrupts >= 16 and invoke it conditionally in 
> acpi_sci_ioapic_setup().The code duplication due to this new function will be cleaned up in a separate patch.

This reads way better, but I have a small nit pick. In the example I gave you there were multiple paragraphs on purpose to separate the different parts. So if I just split the above lump into separate paragraphs:

[1]
   The platforms which support only IOAPIC mode, pass the SCI information
   above the legacy space (0-15) via the FADT mechanism and not via MADT.

[2]
   In such cases the mp_override_legacy_irq() used by acpi_sci_ioapic_setup()
   to register SCI interrupts fails for interrupts >= 16, since it is meant to
   handle only legacy space and throws error "Invalid bus_irq %u for legacy
   override".

[3]
   Hence add a new function to handle SCI interrupts >= 16 and
   invoke it conditionally in acpi_sci_ioapic_setup().

[4]
   The code duplication due to this new function will be cleaned up in a
   separate patch.

then this is clearly structured:

[1] describes the context.

[2] describes the failure

[3] describes the solution

[4] is an extra note to tell the reviewer/reader that you are aware of the
    code duplication and this is addressed later. 

No need to resend. I can do that when picking it up.
Thanks.

> Co-developed-by: Sunil V L <sunil.vl@hpe.com>

I had a discussion with Greg about this tag which resulted in a patch so it should be soon part of the official documentation:

 https://lkml.kernel.org/r/20171116132309.GA8449@kroah.com

Great. Good to know that.

We agreed that both authors should add their Signed-off-by to document that the work conforms with the Developer Certificate of Origin. I'll add that if that's ok for you.

I am OK with that. Please go ahead.

Thanks for following up!

Thank you for the review.

       tglx

[tip:x86/urgent] x86/acpi: Handle SCI interrupts above legacy space gracefully

[tip-bot for Vikas C Sajjan]

Commit-ID:  252714155f04c5d16989cb3aadb85fd1b5772f99
Gitweb:     https://git.kernel.org/tip/252714155f04c5d16989cb3aadb85fd1b5772f99
Author:     Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
AuthorDate: Thu, 16 Nov 2017 21:43:44 +0530
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 17 Nov 2017 15:30:33 +0100

x86/acpi: Handle SCI interrupts above legacy space gracefully

Platforms which support only IOAPIC mode, pass the SCI information above
the legacy space (0-15) via the FADT mechanism and not via MADT.

In such cases mp_override_legacy_irq() which is invoked from
acpi_sci_ioapic_setup() to register SCI interrupts fails for interrupts
greater equal 16, since it is meant to handle only the legacy space and
emits error "Invalid bus_irq %u for legacy override".

Add a new function to handle SCI interrupts >= 16 and invoke it
conditionally in acpi_sci_ioapic_setup().

The code duplication due to this new function will be cleaned up in a
separate patch.

Co-developed-by: Sunil V L <sunil.vl@hpe.com>
Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Signed-off-by: Sunil V L <sunil.vl@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Abdul Lateef Attar <abdul-lateef.attar@hpe.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: kkamagui@gmail.com
Cc: linux-acpi@vger.kernel.org
Link: https://lkml.kernel.org/r/1510848825-21965-2-git-send-email-vikas.cha.sajjan@hpe.com

---
 arch/x86/kernel/acpi/boot.c | 34 +++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index ef9e02e..7615379 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -429,6 +429,34 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
 	return 0;
 }
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi)
+{
+	struct mpc_intsrc mp_irq;
+	int ioapic, pin;
+
+	/* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
+	ioapic = mp_find_ioapic(gsi);
+	if (ioapic < 0) {
+		pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
+		return ioapic;
+	}
+
+	pin = mp_find_ioapic_pin(ioapic, gsi);
+
+	mp_irq.type = MP_INTSRC;
+	mp_irq.irqtype = mp_INT;
+	mp_irq.irqflag = (trigger << 2) | polarity;
+	mp_irq.srcbus = MP_ISA_BUS;
+	mp_irq.srcbusirq = bus_irq;
+	mp_irq.dstapic = mpc_ioapic_id(ioapic);
+	mp_irq.dstirq = pin;
+
+	mp_save_irq(&mp_irq);
+
+	return 0;
+}
+
 static int __init
 acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
 {
@@ -473,7 +501,11 @@ static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger,
 	if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
 		polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
 
-	mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	if (bus_irq < NR_IRQS_LEGACY)
+		mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
+	else
+		mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
+
 	acpi_penalize_sci_irq(bus_irq, trigger, polarity);
 
 	/*

[PATCH v3 2/2] acpi/x86: Reuse the mp_register_ioapic_irq() in the function mp_override_legacy_irq()

[Vikas C Sajjan]

Modify the function mp_override_legacy_irq() to reuse the newly introduced
function mp_register_ioapic_irq().

Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/acpi/boot.c | 27 +++++----------------------
 1 file changed, 5 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 7615379..f4c463d 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -342,13 +342,12 @@ static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)
 #ifdef CONFIG_X86_IO_APIC
 #define MP_ISA_BUS		0
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi);
+
 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 					  u32 gsi)
 {
-	int ioapic;
-	int pin;
-	struct mpc_intsrc mp_irq;
-
 	/*
 	 * Check bus_irq boundary.
 	 */
@@ -358,14 +357,6 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 	}
 
 	/*
-	 * Convert 'gsi' to 'ioapic.pin'.
-	 */
-	ioapic = mp_find_ioapic(gsi);
-	if (ioapic < 0)
-		return;
-	pin = mp_find_ioapic_pin(ioapic, gsi);
-
-	/*
 	 * TBD: This check is for faulty timer entries, where the override
 	 *      erroneously sets the trigger to level, resulting in a HUGE
 	 *      increase of timer interrupts!
@@ -373,16 +364,8 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 	if ((bus_irq == 0) && (trigger == 3))
 		trigger = 1;
 
-	mp_irq.type = MP_INTSRC;
-	mp_irq.irqtype = mp_INT;
-	mp_irq.irqflag = (trigger << 2) | polarity;
-	mp_irq.srcbus = MP_ISA_BUS;
-	mp_irq.srcbusirq = bus_irq;	/* IRQ */
-	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
-	mp_irq.dstirq = pin;	/* INTIN# */
-
-	mp_save_irq(&mp_irq);
-
+	if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
+		return;
 	/*
 	 * Reset default identity mapping if gsi is also an legacy IRQ,
 	 * otherwise there will be more than one entry with the same GSI
-- 
1.9.1

[tip:x86/urgent] x86/acpi: Reduce code duplication in mp_override_legacy_irq()

[tip-bot for Vikas C Sajjan]

Commit-ID:  4ee2ec1b122599f7b10c849fa7915cebb37b7edb
Gitweb:     https://git.kernel.org/tip/4ee2ec1b122599f7b10c849fa7915cebb37b7edb
Author:     Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
AuthorDate: Thu, 16 Nov 2017 21:43:45 +0530
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 17 Nov 2017 15:30:33 +0100

x86/acpi: Reduce code duplication in mp_override_legacy_irq()

The new function mp_register_ioapic_irq() is a subset of the code in
mp_override_legacy_irq().

Replace the code duplication by invoking mp_register_ioapic_irq() from
mp_override_legacy_irq().

Signed-off-by: Vikas C Sajjan <vikas.cha.sajjan@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: linux-pm@vger.kernel.org
Cc: kkamagui@gmail.com
Cc: linux-acpi@vger.kernel.org
Link: https://lkml.kernel.org/r/1510848825-21965-3-git-send-email-vikas.cha.sajjan@hpe.com

---
 arch/x86/kernel/acpi/boot.c | 27 +++++----------------------
 1 file changed, 5 insertions(+), 22 deletions(-)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 7615379..f4c463d 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -342,13 +342,12 @@ acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long e
 #ifdef CONFIG_X86_IO_APIC
 #define MP_ISA_BUS		0
 
+static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
+						u8 trigger, u32 gsi);
+
 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 					  u32 gsi)
 {
-	int ioapic;
-	int pin;
-	struct mpc_intsrc mp_irq;
-
 	/*
 	 * Check bus_irq boundary.
 	 */
@@ -358,14 +357,6 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 	}
 
 	/*
-	 * Convert 'gsi' to 'ioapic.pin'.
-	 */
-	ioapic = mp_find_ioapic(gsi);
-	if (ioapic < 0)
-		return;
-	pin = mp_find_ioapic_pin(ioapic, gsi);
-
-	/*
 	 * TBD: This check is for faulty timer entries, where the override
 	 *      erroneously sets the trigger to level, resulting in a HUGE
 	 *      increase of timer interrupts!
@@ -373,16 +364,8 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
 	if ((bus_irq == 0) && (trigger == 3))
 		trigger = 1;
 
-	mp_irq.type = MP_INTSRC;
-	mp_irq.irqtype = mp_INT;
-	mp_irq.irqflag = (trigger << 2) | polarity;
-	mp_irq.srcbus = MP_ISA_BUS;
-	mp_irq.srcbusirq = bus_irq;	/* IRQ */
-	mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */
-	mp_irq.dstirq = pin;	/* INTIN# */
-
-	mp_save_irq(&mp_irq);
-
+	if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
+		return;
 	/*
 	 * Reset default identity mapping if gsi is also an legacy IRQ,
 	 * otherwise there will be more than one entry with the same GSI