From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 00/10] add support for more devices on Meson8 and Meson8b
Date: Thu, 15 Jun 2017 23:33:42 +0200 [thread overview]
Message-ID: <20170615213352.25134-1-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20170611101644.28581-1-martin.blumenstingl@googlemail.com>
This series adds:
- USB support on Meson8 and Meson8b (it seems that some boards show an
error when trying to initialize one of the USB2 PHYs, but we have the
same problem on some GXBB boards. it is working fine for me - on a board
which is not supported upstream yet)
- hardware random number generator support (Meson8 and Meson8b seem to
have two 32-bit hardware random number generator registers, while the
GX SoCs only have one. This is not handled by the meson-rng driver yet,
but that can still be improved later on)
- SAR ADC support
- add reserved memory zones to fix random hangs when filling the memory
(currently only on Meson8 until I have a Meson8b device to test if the
same problem appears there as well)
- use the real ethernet clock on Meson8 and Meson8b to fix ethernet when
the bootloader does not enable the gate clock
- add the SCU (Snoop Control Unit) which is needed for SMP support
- minor preparations for further .dts updates as this already exports the
SDIO clocks (a driver for this MMC controller is work-in-progress) as
well as the corresponding pin definitions in meson8.dtsi
- this adds the pwm_e (typically used for the 32.768 kHz LPO clock for the
SDIO wifi chip) and pwm_f (used on some boards for the dimmable power
LED) pins to meson8.dtsi
NOTE: the .dts changes from this series depend on my previous patch from
[0]: "ARM: dts: meson8: fix the IR receiver pins"
[0] http://lists.infradead.org/pipermail/linux-amlogic/2017-June/003983.html
Changes since v1:
- dropped patches 1-5 which export various clock IDs as these are
already applied by Jerome to clk-meson's next/headers branch
- added new patch "ARM: dts: meson: use C preprocessor friendly include
syntax" so we can use preprocessor macros like GIC_SPI and
IRQ_TYPE_EDGE_RISING in the SAR ADC and USB patches
- added new patch "ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING
macros" so the GIC_SPI and IRQ_TYPE_EDGE_RISING preprocessor macros
are available for the SAR ADC and USB patches (as a side-effect this
also provides a nice cleanup)
- use GIC_SPI and IRQ_TYPE_EDGE_RISING instead of magic numbers in patch
"ARM: dts: meson: add the SAR ADC" and "ARM: dts: meson: add USB
support on Meson8 and Meson8b"
- added (currently unused) "amlogic,meson8-rng" and "amlogic,meson8b-rng"
compatibles in "ARM: dts: meson: add the hardware random number
generator"
- fixed node name (it's the memory region of the ARM Power Firmware,
not the secure monitor firmware) and dropped node alias (of both
reserved memory zones) in "ARM: dts: meson8: add reserved memory zones"
- added Neil's Reviewed-By
Martin Blumenstingl (10):
ARM: dts: meson: use C preprocessor friendly include syntax
ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
ARM: dts: meson8: add the PWM_E and PWM_F pins
ARM: dts: meson8: add the pins for the SDIO controller
ARM: dts: meson: add the SAR ADC
ARM: dts: meson8: add reserved memory zones
ARM: dts: meson: add the hardware random number generator
ARM: dts: meson: add USB support on Meson8 and Meson8b
ARM: dts: meson8b: add the SCU device node
ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
arch/arm/boot/dts/meson.dtsi | 75 +++++++++++++++++++----
arch/arm/boot/dts/meson6-atv1200.dts | 2 +-
arch/arm/boot/dts/meson6.dtsi | 2 +-
arch/arm/boot/dts/meson8.dtsi | 112 ++++++++++++++++++++++++++++++++++-
arch/arm/boot/dts/meson8b.dtsi | 50 ++++++++++++++++
5 files changed, 226 insertions(+), 15 deletions(-)
--
2.13.1
next prev parent reply other threads:[~2017-06-15 21:33 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-11 10:16 [PATCH 00/13] " Martin Blumenstingl
2017-06-11 10:16 ` [PATCH 01/13] clk: meson8b: export the SAR ADC clocks Martin Blumenstingl
2017-06-12 7:28 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 02/13] clk: meson8b: export the SDIO clock Martin Blumenstingl
2017-06-12 7:28 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 03/13] clk: meson8b: export the gate clock for the HW random number generator Martin Blumenstingl
2017-06-12 7:28 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 04/13] clk: meson8b: export the USB clocks Martin Blumenstingl
2017-06-12 7:28 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 05/13] clk: meson8b: export the ethernet gate clock Martin Blumenstingl
2017-06-12 7:28 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 06/13] ARM: dts: meson8: add the PWM_E and PWM_F pins Martin Blumenstingl
2017-06-12 7:32 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 07/13] ARM: dts: meson8: add the pins for the SDIO controller Martin Blumenstingl
2017-06-12 7:32 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 08/13] ARM: dts: meson: add the SAR ADC Martin Blumenstingl
2017-06-12 7:33 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 09/13] ARM: dts: meson8: add reserved memory zones Martin Blumenstingl
2017-06-12 7:32 ` Neil Armstrong
2017-06-14 21:46 ` Martin Blumenstingl
2017-06-11 10:16 ` [PATCH 10/13] ARM: dts: meson: add the hardware random number generator Martin Blumenstingl
2017-06-12 7:35 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 11/13] ARM: dts: meson: add USB support on Meson8 and Meson8b Martin Blumenstingl
2017-06-12 7:36 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 12/13] ARM: dts: meson8b: add the SCU device node Martin Blumenstingl
2017-06-12 7:37 ` Neil Armstrong
2017-06-11 10:16 ` [PATCH 13/13] ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b Martin Blumenstingl
2017-06-12 7:37 ` Neil Armstrong
2017-06-12 7:32 ` [PATCH 00/13] add support for more devices " Jerome Brunet
2017-06-14 21:39 ` Martin Blumenstingl
2017-06-15 21:33 ` Martin Blumenstingl [this message]
2017-06-15 21:33 ` [PATCH v2 01/10] ARM: dts: meson: use C preprocessor friendly include syntax Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 02/10] ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 03/10] ARM: dts: meson8: add the PWM_E and PWM_F pins Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 04/10] ARM: dts: meson8: add the pins for the SDIO controller Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 05/10] ARM: dts: meson: add the SAR ADC Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 06/10] ARM: dts: meson8: add reserved memory zones Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 07/10] ARM: dts: meson: add the hardware random number generator Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 08/10] ARM: dts: meson: add USB support on Meson8 and Meson8b Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 09/10] ARM: dts: meson8b: add the SCU device node Martin Blumenstingl
2017-06-15 21:33 ` [PATCH v2 10/10] ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b Martin Blumenstingl
2017-06-16 19:10 ` [PATCH v2 00/10] add support for more devices " Kevin Hilman
2017-06-16 19:12 ` Kevin Hilman
2017-06-16 23:00 ` Martin Blumenstingl
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170615213352.25134-1-martin.blumenstingl@googlemail.com \
--to=martin.blumenstingl@googlemail.com \
--cc=linus-amlogic@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®