From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Jagadeesh Kona <quic_jkona@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Ajit Pandey <quic_ajipan@quicinc.com>,
Imran Shaik <quic_imrashai@quicinc.com>,
Taniya Das <quic_tdas@quicinc.com>,
Satya Priya Kakitapalli <quic_skakitap@quicinc.com>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/8] clk: qcom: common: Manage rpm, configure PLLs & AON clks in really probe
Date: Thu, 6 Mar 2025 13:45:50 +0100 [thread overview]
Message-ID: <1aa77e2e-6bb0-425c-9b5a-64092f8df9a5@oss.qualcomm.com> (raw)
In-Reply-To: <20250306-videocc-pll-multi-pd-voting-v2-3-0cd00612bc0e@quicinc.com>
On 6.03.2025 9:55 AM, Jagadeesh Kona wrote:
> Add support for runtime power management, PLL configuration and enabling
> critical clocks in qcom_cc_really_probe() to commonize the clock
> controller probe.
>
> The runtime power management is not required for all clock controllers,
> hence handle the rpm based on use_rpm flag in clock controller descriptor.
> Also the power domains need to be kept enabled during pll configuration,
> hence attach all required power domains prior to calling get_sync() on the
> device.
>
> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
> ---
[...]
> + * struct qcom_clk_cfg - To maintain list of clocks that needs to be
> + * kept ON or misc clock register settings
I have some reservations about this name, particularly since 'clk_cfg'
has already been used in the msmbus/interconnect space..
Perhaps qcom_clk_reg_settings?
> + * @offset: address offset for clock register
> + * @mask: bit mask to indicate the bits to update
> + */
> +struct qcom_clk_cfg {
> + unsigned int offset;
> + unsigned int mask;
"u32"
also, to expand it, we probably want "field" and "val" to replace the
calls to regmap_update_bits in some drivers
I think we may keep this /\ struct for things like:
/* Enable clock gating for MDP clocks */
regmap_update_bits(regmap, DISP_CC_MISC_CMD, 0x10, 0x10);
while keeping a separate u32 array of branch clocks to call
qcom_branch_set_clk_en() on - we would then use 3x less memory
> +};
> +
> struct qcom_cc_desc {
> const struct regmap_config *config;
> struct clk_regmap **clks;
> @@ -39,6 +50,11 @@ struct qcom_cc_desc {
> const struct qcom_icc_hws_data *icc_hws;
> size_t num_icc_hws;
> unsigned int icc_first_node_id;
> + struct qcom_clk_cfg *clks_cfg;
> + size_t num_clks_cfg;
> + struct clk_alpha_pll **plls;
Some ancient or "non-standard" SoCs have non-alpha PLLs, please rename
this to something like alpha_plls
Konrad
next prev parent reply other threads:[~2025-03-06 12:45 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CMTYKKilQJYeHUYYKvlqnwv4Q2P-58Ic1v1ndS9HQ8Yhq2xpHuNThibFDjXDEQ1PyNbx__f9BVBr0peoTUdvPg==@protonmail.internalid>
2025-03-06 8:55 ` [PATCH v2 0/8] clk: qcom: Add support to attach multiple power domains in cc probe Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 1/8] dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain Jagadeesh Kona
2025-03-06 10:10 ` Dmitry Baryshkov
2025-03-11 8:47 ` Jagadeesh Kona
2025-03-11 9:49 ` Bryan O'Donoghue
2025-03-11 10:21 ` Konrad Dybcio
2025-03-12 7:14 ` Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 2/8] clk: qcom: common: Add support to configure PLL Jagadeesh Kona
2025-03-06 12:22 ` Konrad Dybcio
2025-03-11 8:56 ` Jagadeesh Kona
2025-03-13 22:39 ` Bjorn Andersson
2025-03-20 16:29 ` Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 3/8] clk: qcom: common: Manage rpm, configure PLLs & AON clks in really probe Jagadeesh Kona
2025-03-06 12:45 ` Konrad Dybcio [this message]
2025-03-11 8:48 ` Jagadeesh Kona
2025-03-07 8:47 ` Dmitry Baryshkov
2025-03-11 8:48 ` Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 4/8] clk: qcom: videocc-sm8450: Move PLL & clk configuration to " Jagadeesh Kona
2025-03-11 9:54 ` Bryan O'Donoghue
2025-03-06 8:55 ` [PATCH v2 5/8] clk: qcom: videocc-sm8550: " Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 6/8] arm64: dts: qcom: Add MXC power domain to videocc node on SM8450 Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 7/8] arm64: dts: qcom: Add MXC power domain to videocc node on SM8550 Jagadeesh Kona
2025-03-06 8:55 ` [PATCH v2 8/8] arm64: dts: qcom: Add MXC power domain to videocc node on SM8650 Jagadeesh Kona
2025-03-11 9:52 ` [PATCH v2 0/8] clk: qcom: Add support to attach multiple power domains in cc probe Bryan O'Donoghue
2025-03-11 10:12 ` Vladimir Zapolskiy
2025-03-11 12:10 ` Bryan O'Donoghue
2025-03-11 17:55 ` Vladimir Zapolskiy
2025-03-11 18:11 ` Bryan O'Donoghue
2025-03-12 7:11 ` Jagadeesh Kona
2025-03-12 7:13 ` Jagadeesh Kona
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