From: Niklas Cassel <niklas.cassel@axis.com>
To: Niklas Cassel <niklass@axis.com>,
Jesper Nilsson <jespern@axis.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-arm-kernel@axis.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 05/10] PCI: artpec6: remove unused defines
Date: Fri, 13 Oct 2017 18:09:08 +0200 [thread overview]
Message-ID: <20171013160914.3220-6-niklas.cassel@axis.com> (raw)
In-Reply-To: <20171013160914.3220-1-niklas.cassel@axis.com>
Commit b015b37e6693 ("PCI: artpec6: Stop enabling writes to
DBI read-only registers") removed the only write using these
defines, but it did not remove the defines.
Remove the defines since they are now unused.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
---
drivers/pci/dwc/pcie-artpec6.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pci/dwc/pcie-artpec6.c b/drivers/pci/dwc/pcie-artpec6.c
index 6653619db6a1..4b8ef266dc2f 100644
--- a/drivers/pci/dwc/pcie-artpec6.c
+++ b/drivers/pci/dwc/pcie-artpec6.c
@@ -37,9 +37,6 @@ struct artpec6_pcie {
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
-#define MISC_CONTROL_1_OFF (PL_OFFSET + 0x1bc)
-#define DBI_RO_WR_EN 1
-
/* ARTPEC-6 specific registers */
#define PCIECFG 0x18
#define PCIECFG_DBG_OEN (1 << 24)
--
2.11.0
next prev parent reply other threads:[~2017-10-13 16:09 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 16:09 [PATCH 00/10] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-10-13 16:09 ` [PATCH 01/10] PCI: dwc: use DMA-API for allocating MSI data Niklas Cassel
2017-10-13 16:42 ` David Laight
2017-10-16 11:43 ` Niklas Cassel
2017-10-13 16:43 ` Jingoo Han
2017-10-16 12:08 ` Niklas Cassel
2017-10-13 16:47 ` Jingoo Han
2017-10-16 12:11 ` Niklas Cassel
2017-10-16 22:16 ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 02/10] PCI: designware-ep: set_msi should only set MMC bits Niklas Cassel
2017-10-16 22:26 ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 03/10] PCI: designware-ep: read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-10-13 16:09 ` [PATCH 04/10] PCI: designware-ep: pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-10-13 16:09 ` Niklas Cassel [this message]
2017-10-13 16:09 ` [PATCH 06/10] PCI: dwc: artpec6: use BIT and GENMASK macros Niklas Cassel
2017-10-13 16:09 ` [PATCH 07/10] PCI: dwc: artpec6: split artpec6_pcie_establish_link to smaller functions Niklas Cassel
2017-10-13 16:09 ` [PATCH 08/10] PCI: dwc: artpec6: add support for endpoint mode Niklas Cassel
2017-10-16 23:43 ` Bjorn Helgaas
2017-10-18 8:03 ` Kishon Vijay Abraham I
2017-10-18 8:15 ` Niklas Cassel
2017-10-18 8:47 ` Kishon Vijay Abraham I
2017-10-19 7:59 ` Christoph Hellwig
2017-10-19 10:57 ` Niklas Cassel
2017-10-19 11:40 ` Niklas Cassel
2017-10-17 22:24 ` Rob Herring
2017-10-18 8:46 ` Kishon Vijay Abraham I
2017-10-20 10:48 ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 09/10] PCI: dwc: make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-10-16 12:40 ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 10/10] PCI: dwc: artpec6: add support for the ARTPEC-7 SoC Niklas Cassel
2017-10-17 22:25 ` Rob Herring
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