From: Niklas Cassel <niklas.cassel@axis.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Jesper Nilsson <jespern@axis.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Kishon Vijay Abraham I" <kishon@ti.com>,
Jingoo Han <jingoohan1@gmail.com>,
"Xiaowei Song" <songxiaowei@hisilicon.com>,
Peter Robinson <pbrobinson@gmail.com>,
Tomasz Nowicki <tn@semihalf.com>,
Gabriele Paoloni <gabriele.paoloni@huawei.com>,
Duc Dang <dhdang@apm.com>, <linux-arm-kernel@axis.com>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 08/10] PCI: dwc: artpec6: add support for endpoint mode
Date: Thu, 19 Oct 2017 13:40:59 +0200 [thread overview]
Message-ID: <30e2bec3-9c5a-465e-1ddf-ee25efb66a60@axis.com> (raw)
In-Reply-To: <20171016234326.GM25517@bhelgaas-glaptop.roam.corp.google.com>
Hello Bjorn
On 10/17/2017 01:43 AM, Bjorn Helgaas wrote:
(snip)
> I see you're copying the DRA7XX style here, but I don't really
> understand it. I guess the idea is to build pcie-artpec6.o if either
> CONFIG_PCIE_ARTPEC6_HOST or CONFIG_PCIE_ARTPEC6_EP is set (or both).
>
> Is this really the simplest way to express that in Kconfig? Both the
> "if PCIE_ARTPEC6" and this ifneq thing are complicated and relatively
> unusual.
I will try Christoph's suggestion.
>
>> ifneq ($(filter y,$(CONFIG_PCI_DRA7XX_HOST) $(CONFIG_PCI_DRA7XX_EP)),)
>> obj-$(CONFIG_PCI_DRA7XX) += pci-dra7xx.o
>> endif
>
>> +static void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar)
>
> Looks funny to have this dw_*() function in pcie-artpec6.c. Intended?
> Or is this something other endpoint drivers could/should share?
As discussed with Kishon, I make sure that the dw_pcie_ep_reset_bar
in pcie-designware-ep.c is no longer static.
>
>> +{
>> + u32 reg;
>> +
>> + reg = PCI_BASE_ADDRESS_0 + (4 * bar);
>> + dw_pcie_dbi_ro_wr_en(pci);
>> + dw_pcie_writel_dbi2(pci, reg, 0x0);
>> + dw_pcie_writel_dbi(pci, reg, 0x0);
>> + dw_pcie_dbi_ro_wr_dis(pci);
>> +}
>> +
>> +static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep)
>> +{
>> + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
>> + struct artpec6_pcie *artpec6_pcie = to_artpec6_pcie(pci);
>> + enum pci_barno bar;
>> +
>> + artpec6_pcie_assert_core_reset(artpec6_pcie);
>> + artpec6_pcie_init_phy(artpec6_pcie);
>> + artpec6_pcie_deassert_core_reset(artpec6_pcie);
>> +
>> + for (bar = BAR_0; bar <= BAR_5; bar++)
>> + dw_pcie_ep_reset_bar(pci, bar);
>> +}
>
> I naively expected some of this new code to be #ifdef PCIE_ARTPEC6_EP.
> But I haven't really internalized the endpoint support, so maybe that
> doesn't make sense?
I copied the style from dra7xx.
But after thinking about it, I agree with you.
If we move dw_pcie_ep_reset_bar and artpec6_pcie_raise_msi_irq
to pcie-designware-ep, the functions that are left are:
artpec6_pcie_stop_link
artpec6_pcie_ep_init
artpec6_pcie_raise_irq
artpec6_add_pcie_ep
the compatible in the of match table
The only function I'm hesitant about is .stop_link,
since it is in dw_pcie_ops, however, right now it
is only used in pcie-designware-ep.c
Would you prefer me to make them #ifdef PCIE_ARTPEC6_EP ?
I can do a similar patch for pci-dra7xx.
Regards,
Niklas
next prev parent reply other threads:[~2017-10-19 11:41 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 16:09 [PATCH 00/10] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-10-13 16:09 ` [PATCH 01/10] PCI: dwc: use DMA-API for allocating MSI data Niklas Cassel
2017-10-13 16:42 ` David Laight
2017-10-16 11:43 ` Niklas Cassel
2017-10-13 16:43 ` Jingoo Han
2017-10-16 12:08 ` Niklas Cassel
2017-10-13 16:47 ` Jingoo Han
2017-10-16 12:11 ` Niklas Cassel
2017-10-16 22:16 ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 02/10] PCI: designware-ep: set_msi should only set MMC bits Niklas Cassel
2017-10-16 22:26 ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 03/10] PCI: designware-ep: read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-10-13 16:09 ` [PATCH 04/10] PCI: designware-ep: pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-10-13 16:09 ` [PATCH 05/10] PCI: artpec6: remove unused defines Niklas Cassel
2017-10-13 16:09 ` [PATCH 06/10] PCI: dwc: artpec6: use BIT and GENMASK macros Niklas Cassel
2017-10-13 16:09 ` [PATCH 07/10] PCI: dwc: artpec6: split artpec6_pcie_establish_link to smaller functions Niklas Cassel
2017-10-13 16:09 ` [PATCH 08/10] PCI: dwc: artpec6: add support for endpoint mode Niklas Cassel
2017-10-16 23:43 ` Bjorn Helgaas
2017-10-18 8:03 ` Kishon Vijay Abraham I
2017-10-18 8:15 ` Niklas Cassel
2017-10-18 8:47 ` Kishon Vijay Abraham I
2017-10-19 7:59 ` Christoph Hellwig
2017-10-19 10:57 ` Niklas Cassel
2017-10-19 11:40 ` Niklas Cassel [this message]
2017-10-17 22:24 ` Rob Herring
2017-10-18 8:46 ` Kishon Vijay Abraham I
2017-10-20 10:48 ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 09/10] PCI: dwc: make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-10-16 12:40 ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 10/10] PCI: dwc: artpec6: add support for the ARTPEC-7 SoC Niklas Cassel
2017-10-17 22:25 ` Rob Herring
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