mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Niklas Cassel <niklas.cassel@axis.com>
To: David Laight <David.Laight@ACULAB.COM>,
	Jingoo Han <jingoohan1@gmail.com>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 01/10] PCI: dwc: use DMA-API for allocating MSI data
Date: Mon, 16 Oct 2017 13:43:46 +0200	[thread overview]
Message-ID: <2057f883-0c02-3e56-f3c2-ecc90e778e8e@axis.com> (raw)
In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6DD009511B@AcuExch.aculab.com>

On 10/13/2017 06:42 PM, David Laight wrote:
> From: Behalf Of Niklas Cassel
>> Sent: 13 October 2017 17:09
>> Since it is a PCIe endpoint device, rather than the CPU, that is supposed
>> to write to this location, the proper way to get the address to this this
>> location is really to use the DMA API, rather than virt_to_phys.
>>
>> Using virt_to_phys might work on some systems, but by using the DMA API,
>> we know that it will work on all systems.
>>
>> This is essentially the same thing as allocating a buffer in a driver,
>> to which the endpoint will write to. To do this, we use the DMA API.
>>
>> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
>> ---
>>  drivers/pci/dwc/pcie-designware-host.c | 23 ++++++++++++++++-------
>>  drivers/pci/dwc/pcie-designware.h      |  3 ++-
>>  2 files changed, 18 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
>> index 81e2157a7cfb..f6d152ea2a03 100644
>> --- a/drivers/pci/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/dwc/pcie-designware-host.c
>> @@ -83,16 +83,25 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
>>
>>  void dw_pcie_msi_init(struct pcie_port *pp)
>>  {
>> +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> +	struct device *dev = pci->dev;
>> +	struct page *page;
>>  	u64 msi_target;
>>
>> -	pp->msi_data = __get_free_pages(GFP_KERNEL, 0);
>> -	msi_target = virt_to_phys((void *)pp->msi_data);
>> +	page = alloc_page(GFP_KERNEL | GFP_DMA32);
>> +	pp->msi_data = dma_map_page(dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
> 
> Where are the matching frees?

Hello David.

I couldn't find any matching free_pages call to the
__get_free_pages() allocation, so following the same design,
I did not add a dma_unmap_page.

The current design of most (all?) DWC PCI drivers is that
they can only be built-in (i.e. not built as a module),
and that they cannot be unbinded (suppress_bind_attrs
= true in the platform_driver struct).

I will be happy to add a dma_unmap_page (and free_pages),
if the maintainer suggests somewhere where I should put it.

Regards,
Niklas

> 
> 	David
> 
>> +	if (dma_mapping_error(dev, pp->msi_data)) {
>> +		dev_err(dev, "failed to map msi data\n");
>> +		__free_page(page);
>> +		return;
>> +	}
>> +	msi_target = (u64)pp->msi_data;
>>
>>  	/* program the msi_data */
>>  	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
>> -			    (u32)(msi_target & 0xffffffff));
>> +			    lower_32_bits(msi_target));
>>  	dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
>> -			    (u32)(msi_target >> 32 & 0xffffffff));
>> +			    upper_32_bits(msi_target));
>>  }
>>
>>  static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq)
>> @@ -187,10 +196,10 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos)
>>  	if (pp->ops->get_msi_addr)
>>  		msi_target = pp->ops->get_msi_addr(pp);
>>  	else
>> -		msi_target = virt_to_phys((void *)pp->msi_data);
>> +		msi_target = (u64)pp->msi_data;
>>
>> -	msg.address_lo = (u32)(msi_target & 0xffffffff);
>> -	msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff);
>> +	msg.address_lo = lower_32_bits(msi_target);
>> +	msg.address_hi = upper_32_bits(msi_target);
>>
>>  	if (pp->ops->get_msi_data)
>>  		msg.data = pp->ops->get_msi_data(pp, pos);
>> diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h
>> index e5d9d77b778e..547352a317f8 100644
>> --- a/drivers/pci/dwc/pcie-designware.h
>> +++ b/drivers/pci/dwc/pcie-designware.h
>> @@ -17,6 +17,7 @@
>>  #include <linux/irq.h>
>>  #include <linux/msi.h>
>>  #include <linux/pci.h>
>> +#include <linux/dma-mapping.h>
>>
>>  #include <linux/pci-epc.h>
>>  #include <linux/pci-epf.h>
>> @@ -168,7 +169,7 @@ struct pcie_port {
>>  	const struct dw_pcie_host_ops *ops;
>>  	int			msi_irq;
>>  	struct irq_domain	*irq_domain;
>> -	unsigned long		msi_data;
>> +	dma_addr_t		msi_data;
>>  	DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
>>  };
>>
>> --
>> 2.11.0
> 

  reply	other threads:[~2017-10-16 11:43 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-13 16:09 [PATCH 00/10] dwc MSI fixes, ARTPEC-6 EP mode support, ARTPEC-7 SoC support Niklas Cassel
2017-10-13 16:09 ` [PATCH 01/10] PCI: dwc: use DMA-API for allocating MSI data Niklas Cassel
2017-10-13 16:42   ` David Laight
2017-10-16 11:43     ` Niklas Cassel [this message]
2017-10-13 16:43   ` Jingoo Han
2017-10-16 12:08     ` Niklas Cassel
2017-10-13 16:47   ` Jingoo Han
2017-10-16 12:11     ` Niklas Cassel
2017-10-16 22:16   ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 02/10] PCI: designware-ep: set_msi should only set MMC bits Niklas Cassel
2017-10-16 22:26   ` Bjorn Helgaas
2017-10-13 16:09 ` [PATCH 03/10] PCI: designware-ep: read-only registers need DBI_RO_WR_EN to be writable Niklas Cassel
2017-10-13 16:09 ` [PATCH 04/10] PCI: designware-ep: pre-allocate memory for MSI in dw_pcie_ep_init Niklas Cassel
2017-10-13 16:09 ` [PATCH 05/10] PCI: artpec6: remove unused defines Niklas Cassel
2017-10-13 16:09 ` [PATCH 06/10] PCI: dwc: artpec6: use BIT and GENMASK macros Niklas Cassel
2017-10-13 16:09 ` [PATCH 07/10] PCI: dwc: artpec6: split artpec6_pcie_establish_link to smaller functions Niklas Cassel
2017-10-13 16:09 ` [PATCH 08/10] PCI: dwc: artpec6: add support for endpoint mode Niklas Cassel
2017-10-16 23:43   ` Bjorn Helgaas
2017-10-18  8:03     ` Kishon Vijay Abraham I
2017-10-18  8:15       ` Niklas Cassel
2017-10-18  8:47         ` Kishon Vijay Abraham I
2017-10-19  7:59     ` Christoph Hellwig
2017-10-19 10:57       ` Niklas Cassel
2017-10-19 11:40     ` Niklas Cassel
2017-10-17 22:24   ` Rob Herring
2017-10-18  8:46   ` Kishon Vijay Abraham I
2017-10-20 10:48     ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 09/10] PCI: dwc: make cpu_addr_fixup take struct dw_pcie as argument Niklas Cassel
2017-10-16 12:40   ` Niklas Cassel
2017-10-13 16:09 ` [PATCH 10/10] PCI: dwc: artpec6: add support for the ARTPEC-7 SoC Niklas Cassel
2017-10-17 22:25   ` Rob Herring

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=2057f883-0c02-3e56-f3c2-ecc90e778e8e@axis.com \
    --to=niklas.cassel@axis.com \
    --cc=David.Laight@ACULAB.COM \
    --cc=Joao.Pinto@synopsys.com \
    --cc=bhelgaas@google.com \
    --cc=jingoohan1@gmail.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

Powered by JetHome