* [PATCH v9 1/3] Documentation: Add device tree binding for Goldfish PIC driver
2017-11-15 13:42 [PATCH v9 0/3] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
@ 2017-11-15 13:42 ` Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 2/3] irqchip/irq-goldfish-pic: Add " Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board Aleksandar Markovic
2 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2017-11-15 13:42 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, devicetree, Douglas Leung, Greg Kroah-Hartman,
James Hogan, Jason Cooper, linux-kernel, Marc Zyngier,
Mark Rutland, Mauro Carvalho Chehab, Paul Burton,
Petar Jovanovic, Raghu Gandham, Randy Dunlap, Rob Herring,
Thomas Gleixner
From: Miodrag Dinic <miodrag.dinic@mips.com>
Add documentation for DT binding of Goldfish PIC driver. The compatible
string used by OS for binding the driver is "google,goldfish-pic".
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../interrupt-controller/google,goldfish-pic.txt | 30 ++++++++++++++++++++++
MAINTAINERS | 5 ++++
2 files changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
new file mode 100644
index 0000000..35f7527
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
@@ -0,0 +1,30 @@
+Android Goldfish PIC
+
+Android Goldfish programmable interrupt device used by Android
+emulator.
+
+Required properties:
+
+- compatible : should contain "google,goldfish-pic"
+- reg : <registers mapping>
+- interrupts : <interrupt mapping>
+
+Example for mips when used in cascade mode:
+
+ cpuintc {
+ #interrupt-cells = <0x1>;
+ #address-cells = <0>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ interrupt-controller@1f000000 {
+ compatible = "google,goldfish-pic";
+ reg = <0x1f000000 0x1000>;
+
+ interrupt-controller;
+ #interrupt-cells = <0x1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <0x2>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 650aa0e..998e705 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -872,6 +872,11 @@ S: Supported
F: drivers/android/
F: drivers/staging/android/
+ANDROID GOLDFISH PIC DRIVER
+M: Miodrag Dinic <miodrag.dinic@mips.com>
+S: Supported
+F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
+
ANDROID GOLDFISH RTC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v9 2/3] irqchip/irq-goldfish-pic: Add Goldfish PIC driver
2017-11-15 13:42 [PATCH v9 0/3] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 1/3] Documentation: Add device tree binding for Goldfish PIC driver Aleksandar Markovic
@ 2017-11-15 13:42 ` Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board Aleksandar Markovic
2 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2017-11-15 13:42 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, James Hogan,
Jason Cooper, linux-kernel, Marc Zyngier, Mauro Carvalho Chehab,
Paul Burton, Petar Jovanovic, Raghu Gandham, Randy Dunlap,
Thomas Gleixner
From: Miodrag Dinic <miodrag.dinic@mips.com>
Add device driver for a virtual programmable interrupt controller
The virtual PIC is designed as a device tree-based interrupt controller.
The compatible string used by OS for binding the driver is
"google,goldfish-pic".
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
MAINTAINERS | 1 +
drivers/irqchip/Kconfig | 8 +++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-goldfish-pic.c | 139 +++++++++++++++++++++++++++++++++++++
4 files changed, 149 insertions(+)
create mode 100644 drivers/irqchip/irq-goldfish-pic.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 998e705..381c9c8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -876,6 +876,7 @@ ANDROID GOLDFISH PIC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
S: Supported
F: Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt
+F: drivers/irqchip/irq-goldfish-pic.c
ANDROID GOLDFISH RTC DRIVER
M: Miodrag Dinic <miodrag.dinic@mips.com>
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 53380bd..af810b6 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -336,4 +336,12 @@ config MESON_IRQ_GPIO
help
Support Meson SoC Family GPIO Interrupt Multiplexer
+config GOLDFISH_PIC
+ bool "Goldfish programmable interrupt controller"
+ depends on MIPS && (GOLDFISH || COMPILE_TEST)
+ select IRQ_DOMAIN
+ help
+ Say yes here to enable Goldfish interrupt controller driver used
+ for Goldfish based virtual platforms.
+
endmenu
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index dae7282..1f6fb9d 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -83,3 +83,4 @@ obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
obj-$(CONFIG_ARCH_SYNQUACER) += irq-sni-exiu.o
obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o
+obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o
diff --git a/drivers/irqchip/irq-goldfish-pic.c b/drivers/irqchip/irq-goldfish-pic.c
new file mode 100644
index 0000000..2a92f03
--- /dev/null
+++ b/drivers/irqchip/irq-goldfish-pic.c
@@ -0,0 +1,139 @@
+/*
+ * Driver for MIPS Goldfish Programmable Interrupt Controller.
+ *
+ * Author: Miodrag Dinic <miodrag.dinic@mips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define GFPIC_NR_IRQS 32
+
+/* 8..39 Cascaded Goldfish PIC interrupts */
+#define GFPIC_IRQ_BASE 8
+
+#define GFPIC_REG_IRQ_PENDING 0x04
+#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
+#define GFPIC_REG_IRQ_DISABLE 0x0c
+#define GFPIC_REG_IRQ_ENABLE 0x10
+
+struct goldfish_pic_data {
+ void __iomem *base;
+ struct irq_domain *irq_domain;
+};
+
+static void goldfish_pic_cascade(struct irq_desc *desc)
+{
+ struct goldfish_pic_data *gfpic = irq_desc_get_handler_data(desc);
+ struct irq_chip *host_chip = irq_desc_get_chip(desc);
+ u32 pending, hwirq, virq;
+
+ chained_irq_enter(host_chip, desc);
+
+ pending = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
+ while (pending) {
+ hwirq = __fls(pending);
+ virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
+ generic_handle_irq(virq);
+ pending &= ~(1 << hwirq);
+ }
+
+ chained_irq_exit(host_chip, desc);
+}
+
+static const struct irq_domain_ops goldfish_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init goldfish_pic_of_init(struct device_node *of_node,
+ struct device_node *parent)
+{
+ struct goldfish_pic_data *gfpic;
+ struct irq_chip_generic *gc;
+ struct irq_chip_type *ct;
+ unsigned int parent_irq;
+ int ret = 0;
+
+ gfpic = kzalloc(sizeof(*gfpic), GFP_KERNEL);
+ if (!gfpic) {
+ ret = -ENOMEM;
+ goto out_err;
+ }
+
+ parent_irq = irq_of_parse_and_map(of_node, 0);
+ if (!parent_irq) {
+ pr_err("Failed to map parent IRQ!\n");
+ ret = -EINVAL;
+ goto out_free;
+ }
+
+ gfpic->base = of_iomap(of_node, 0);
+ if (!gfpic->base) {
+ pr_err("Failed to map base address!\n");
+ ret = -ENOMEM;
+ goto out_unmap_irq;
+ }
+
+ /* Mask interrupts. */
+ writel(1, gfpic->base + GFPIC_REG_IRQ_DISABLE_ALL);
+
+ gc = irq_alloc_generic_chip("GFPIC", 1, GFPIC_IRQ_BASE, gfpic->base,
+ handle_level_irq);
+ if (!gc) {
+ pr_err("Failed to allocate chip structures!\n");
+ ret = -ENOMEM;
+ goto out_iounmap;
+ }
+
+ ct = gc->chip_types;
+ ct->regs.enable = GFPIC_REG_IRQ_ENABLE;
+ ct->regs.disable = GFPIC_REG_IRQ_DISABLE;
+ ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
+ ct->chip.irq_mask = irq_gc_mask_disable_reg;
+
+ irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0,
+ IRQ_NOPROBE | IRQ_LEVEL, 0);
+
+ gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
+ GFPIC_IRQ_BASE, 0,
+ &goldfish_irq_domain_ops,
+ NULL);
+ if (!gfpic->irq_domain) {
+ pr_err("Failed to add irqdomain!\n");
+ ret = -ENOMEM;
+ goto out_destroy_generic_chip;
+ }
+
+ irq_set_chained_handler_and_data(parent_irq,
+ goldfish_pic_cascade, gfpic);
+
+ pr_info("Successfully registered.\n");
+ return 0;
+
+out_destroy_generic_chip:
+ irq_destroy_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS),
+ IRQ_NOPROBE | IRQ_LEVEL, 0);
+out_iounmap:
+ iounmap(gfpic->base);
+out_unmap_irq:
+ irq_dispose_mapping(parent_irq);
+out_free:
+ kfree(gfpic);
+out_err:
+ pr_err("Failed to initialize! (errno = %d)\n", ret);
+ return ret;
+}
+
+IRQCHIP_DECLARE(google_gf_pic, "google,goldfish-pic", goldfish_pic_of_init);
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board
2017-11-15 13:42 [PATCH v9 0/3] MIPS: Add virtual Ranchu board as a generic-based board Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 1/3] Documentation: Add device tree binding for Goldfish PIC driver Aleksandar Markovic
2017-11-15 13:42 ` [PATCH v9 2/3] irqchip/irq-goldfish-pic: Add " Aleksandar Markovic
@ 2017-11-15 13:42 ` Aleksandar Markovic
2017-11-15 21:59 ` James Hogan
2 siblings, 1 reply; 6+ messages in thread
From: Aleksandar Markovic @ 2017-11-15 13:42 UTC (permalink / raw)
To: linux-mips
Cc: Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, James Hogan,
linux-kernel, Mauro Carvalho Chehab, Paul Burton,
Petar Jovanovic, Raghu Gandham, Ralf Baechle, Randy Dunlap
From: Miodrag Dinic <miodrag.dinic@mips.com>
Provide amendments to the MIPS generic platform framework so that
the new generic-based board Ranchu can be chosen to be built.
The Ranchu board is intended to be used by Android emulator. The name
"Ranchu" originates from Android development community. "Goldfish" and
"Ranchu" are terms used for two generations of virtual boards used by
Android emulator. The name "Ranchu" is a newer one among the two, and
this patch deals with Ranchu. However, for historical reasons, some
devices/drivers still contain the name "Goldfish".
MIPS Ranchu machine includes a number of Goldfish devices. The support
for Virtio devices is also included. Ranchu board supports up to 16
Virtio devices which can be attached using Virtio MMIO Bus. This is
summarized in the following picture:
ABUS
||----MIPS CPU
|| | IRQs
||----Goldfish PIC------------(32)--------
|| | | | | | | | | |
||----Goldfish TTY------ | | | | | | | |
|| | | | | | | | |
||----Goldfish RTC-------- | | | | | | |
|| | | | | | | |
||----Goldfish FB----------- | | | | | |
|| | | | | | |
||----Goldfish Events--------- | | | | |
|| | | | | |
||----Goldfish Audio------------ | | | |
|| | | | |
||----Goldfish Battery------------ | | |
|| | | |
||----Android PIPE------------------ | |
|| | |
||----Virtio MMIO Bus | |
|| | | | | |
|| | | (virtio-block)--------- |
|| (16) | |
|| | (virtio-net)------------------
Device Tree is created on the QEMU side based on the information about
devices IO map and IRQ numbers. Kernel will load this DTB using UHI
boot protocol DTB handover mode.
Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com>
Signed-off-by: Goran Ferenc <goran.ferenc@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
---
MAINTAINERS | 7 +++
arch/mips/configs/generic/board-ranchu.config | 30 ++++++++++
arch/mips/generic/Kconfig | 10 ++++
arch/mips/generic/Makefile | 1 +
arch/mips/generic/board-ranchu.c | 85 +++++++++++++++++++++++++++
5 files changed, 133 insertions(+)
create mode 100644 arch/mips/configs/generic/board-ranchu.config
create mode 100644 arch/mips/generic/board-ranchu.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 381c9c8..72e9b90 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11335,6 +11335,13 @@ S: Maintained
F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
+RANCHU VIRTUAL BOARD FOR MIPS
+M: Miodrag Dinic <miodrag.dinic@mips.com>
+L: linux-mips@linux-mips.org
+S: Supported
+F: arch/mips/generic/board-ranchu.c
+F: arch/mips/configs/generic/board-ranchu.config
+
RANDOM NUMBER DRIVER
M: "Theodore Ts'o" <tytso@mit.edu>
S: Maintained
diff --git a/arch/mips/configs/generic/board-ranchu.config b/arch/mips/configs/generic/board-ranchu.config
new file mode 100644
index 0000000..fee9ad4
--- /dev/null
+++ b/arch/mips/configs/generic/board-ranchu.config
@@ -0,0 +1,30 @@
+CONFIG_VIRT_BOARD_RANCHU=y
+
+CONFIG_BATTERY_GOLDFISH=y
+CONFIG_FB=y
+CONFIG_FB_GOLDFISH=y
+CONFIG_GOLDFISH=y
+CONFIG_STAGING=y
+CONFIG_GOLDFISH_AUDIO=y
+CONFIG_GOLDFISH_PIC=y
+CONFIG_GOLDFISH_PIPE=y
+CONFIG_GOLDFISH_TTY=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_GOLDFISH=y
+
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
+
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_POWER_SUPPLY=y
+CONFIG_POWER_RESET=y
+CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
+
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
+CONFIG_NETDEVICES=y
+CONFIG_VIRTIO_NET=y
diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
index 0b67c46..aedcc21 100644
--- a/arch/mips/generic/Kconfig
+++ b/arch/mips/generic/Kconfig
@@ -43,4 +43,14 @@ config FIT_IMAGE_FDT_NI169445
Enable this to include the FDT for the 169445 platform from
National Instruments in the FIT kernel image.
+config VIRT_BOARD_RANCHU
+ bool "Support Ranchu platform for Android emulator"
+ help
+ This enables support for the platform used by Android emulator.
+
+ Ranchu platform consists of a set of virtual devices. This platform
+ enables emulation of variety of virtual configurations while using
+ Android emulator. Android emulator is based on Qemu, and contains
+ the support for the same set of virtual devices.
+
endif
diff --git a/arch/mips/generic/Makefile b/arch/mips/generic/Makefile
index 8749673..5fb60c8 100644
--- a/arch/mips/generic/Makefile
+++ b/arch/mips/generic/Makefile
@@ -15,3 +15,4 @@ obj-y += proc.o
obj-$(CONFIG_YAMON_DT_SHIM) += yamon-dt.o
obj-$(CONFIG_LEGACY_BOARD_SEAD3) += board-sead3.o
obj-$(CONFIG_KEXEC) += kexec.o
+obj-$(CONFIG_VIRT_BOARD_RANCHU) += board-ranchu.o
diff --git a/arch/mips/generic/board-ranchu.c b/arch/mips/generic/board-ranchu.c
new file mode 100644
index 0000000..0efc555
--- /dev/null
+++ b/arch/mips/generic/board-ranchu.c
@@ -0,0 +1,85 @@
+/*
+ * Support code for virtual Ranchu board for MIPS.
+ *
+ * Author: Miodrag Dinic <miodrag.dinic@mips.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/of_address.h>
+#include <linux/types.h>
+
+#include <asm/machine.h>
+#include <asm/mipsregs.h>
+#include <asm/time.h>
+
+#define GOLDFISH_TIMER_LOW 0x00
+#define GOLDFISH_TIMER_HIGH 0x04
+
+static __init u64 read_rtc_time(void __iomem *base)
+{
+ u32 time_low;
+ u32 time_high;
+
+ /*
+ * Reading the low address latches the high value
+ * as well so there is no fear that we may read
+ * inaccurate high value.
+ */
+ time_low = readl(base + GOLDFISH_TIMER_LOW);
+ time_high = readl(base + GOLDFISH_TIMER_HIGH);
+
+ return ((u64)time_high << 32) | time_low;
+}
+
+static __init unsigned int ranchu_measure_hpt_freq(void)
+{
+ u64 rtc_start, rtc_current, rtc_delta;
+ unsigned int start, count;
+ struct device_node *np;
+ void __iomem *rtc_base;
+
+ np = of_find_compatible_node(NULL, NULL, "google,goldfish-rtc");
+ if (!np)
+ panic("%s(): Failed to find 'google,goldfish-rtc' dt node!",
+ __func__);
+
+ rtc_base = of_iomap(np, 0);
+ if (!rtc_base)
+ panic("%s(): Failed to ioremap Goldfish RTC base!", __func__);
+
+ /*
+ * Poll the nanosecond resolution RTC for one
+ * second to calibrate the CPU frequency.
+ */
+ rtc_start = read_rtc_time(rtc_base);
+ start = read_c0_count();
+
+ do {
+ rtc_current = read_rtc_time(rtc_base);
+ rtc_delta = rtc_current - rtc_start;
+ } while (rtc_delta < NSEC_PER_SEC);
+
+ count = read_c0_count() - start;
+
+ count += 5000; /* round */
+ count -= count % 10000;
+
+ iounmap(rtc_base);
+
+ return count;
+}
+
+static const struct of_device_id ranchu_of_match[] __initconst = {
+ {
+ .compatible = "mti,ranchu",
+ },
+};
+
+MIPS_MACHINE(ranchu) = {
+ .matches = ranchu_of_match,
+ .measure_hpt_freq = ranchu_measure_hpt_freq,
+};
--
2.7.4
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board
2017-11-15 13:42 ` [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board Aleksandar Markovic
@ 2017-11-15 21:59 ` James Hogan
2017-11-16 12:45 ` Aleksandar Markovic
0 siblings, 1 reply; 6+ messages in thread
From: James Hogan @ 2017-11-15 21:59 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: linux-mips, Miodrag Dinic, Goran Ferenc, Aleksandar Markovic,
David S. Miller, Douglas Leung, Greg Kroah-Hartman, linux-kernel,
Mauro Carvalho Chehab, Paul Burton, Petar Jovanovic,
Raghu Gandham, Ralf Baechle, Randy Dunlap
[-- Attachment #1: Type: text/plain, Size: 1167 bytes --]
Hi Aleksandar,
On Wed, Nov 15, 2017 at 02:42:20PM +0100, Aleksandar Markovic wrote:
> diff --git a/arch/mips/configs/generic/board-ranchu.config b/arch/mips/configs/generic/board-ranchu.config
> new file mode 100644
> index 0000000..fee9ad4
> --- /dev/null
> +++ b/arch/mips/configs/generic/board-ranchu.config
> @@ -0,0 +1,30 @@
> +CONFIG_VIRT_BOARD_RANCHU=y
I presume its valid for Ranchu support to be enabled in MIPS32 / MIPS64,
and R1 / R2 / R6 kernels? (that's fine if so, just making sure there's
no need for a require comment).
> diff --git a/arch/mips/generic/board-ranchu.c b/arch/mips/generic/board-ranchu.c
> new file mode 100644
> index 0000000..0efc555
> --- /dev/null
> +++ b/arch/mips/generic/board-ranchu.c
> @@ -0,0 +1,85 @@
...
> +static __init unsigned int ranchu_measure_hpt_freq(void)
> +{
...
> + count += 5000; /* round */
> + count -= count % 10000;
A comment to explain the purpose of the rounding would be helpful. I
presume its there just to get a more accurate value since the frequency
will always be a round value in practice.
Either way this patch looks good to me:
Reviewed-by: James Hogan <jhogan@kernel.org>
Thanks!
James
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread* RE: [PATCH v9 3/3] MIPS: ranchu: Add Ranchu as a new generic-based board
2017-11-15 21:59 ` James Hogan
@ 2017-11-16 12:45 ` Aleksandar Markovic
0 siblings, 0 replies; 6+ messages in thread
From: Aleksandar Markovic @ 2017-11-16 12:45 UTC (permalink / raw)
To: James Hogan, Aleksandar Markovic
Cc: linux-mips, Miodrag Dinic, Goran Ferenc, David S. Miller,
Douglas Leung, Greg Kroah-Hartman, linux-kernel,
Mauro Carvalho Chehab, Paul Burton, Petar Jovanovic,
Raghu Gandham, Ralf Baechle, Randy Dunlap
> From: James Hogan
>
> Hi Aleksandar,
>
> On Wed, Nov 15, 2017 at 02:42:20PM +0100, Aleksandar Markovic wrote:
> > diff --git a/arch/mips/configs/generic/board-ranchu.config b/arch/mips/configs/generic/board-ranchu.config
> > new file mode 100644
> > index 0000000..fee9ad4
> > --- /dev/null
> > +++ b/arch/mips/configs/generic/board-ranchu.config
> > @@ -0,0 +1,30 @@
> > +CONFIG_VIRT_BOARD_RANCHU=y
>
> I presume its valid for Ranchu support to be enabled in MIPS32 / MIPS64,
> and R1 / R2 / R6 kernels? (that's fine if so, just making sure there's
> no need for a require comment).
Yes, Ranchu virtual machine, and Android emulator for that matter, support
all combinations you mentioned.
>
> > diff --git a/arch/mips/generic/board-ranchu.c b/arch/mips/generic/board-ranchu.c
> > new file mode 100644
> > index 0000000..0efc555
> > --- /dev/null
> > +++ b/arch/mips/generic/board-ranchu.c
> > @@ -0,0 +1,85 @@
>
> ...
>
> > +static __init unsigned int ranchu_measure_hpt_freq(void)
> > +{
>
> ...
>
> > + count += 5000; /* round */
> > + count -= count % 10000;
>
> A comment to explain the purpose of the rounding would be helpful. I
> presume its there just to get a more accurate value since the frequency
> will always be a round value in practice.
An appropriate comment will be added in v10, but v10 will be submitted
no sooner than next week, to provide enough time for other people wanting
to review this and other patches.
>
> Either way this patch looks good to me:
> Reviewed-by: James Hogan <jhogan@kernel.org>
>
> Thanks!
> James
I appreciate your review!
Aleksandar
^ permalink raw reply [flat|nested] 6+ messages in thread