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From: "Kirill A. Shutemov" <kirill@shutemov.name>
To: bp@alien8.de
Cc: aarcange@redhat.com, ak@linux.intel.com,
	dan.j.williams@intel.com, dave.hansen@intel.com,
	david@redhat.com, hpa@zytor.com, jgross@suse.com,
	jmattson@google.com, joro@8bytes.org, jpoimboe@redhat.com,
	kirill.shutemov@linux.intel.com, knsathya@kernel.org,
	linux-kernel@vger.kernel.org, luto@kernel.org, mingo@redhat.com,
	pbonzini@redhat.com, peterz@infradead.org,
	sathyanarayanan.kuppuswamy@linux.intel.com, sdeep@vmware.com,
	seanjc@google.com, tglx@linutronix.de, tony.luck@intel.com,
	vkuznets@redhat.com, wanpengli@tencent.com, x86@kernel.org
Subject: [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform
Date: Sat, 19 Feb 2022 03:13:04 +0300	[thread overview]
Message-ID: <20220219001305.22883-1-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <YhAWcPbzgUGcJZjI@zn.tnic>

Kernel derives type of confidential computing platform from sme_me_mask
value and hv_is_isolation_supported(). This detection process will be
more complicated as more platforms get added.

Declare confidential computing vendor explicitly via cc_init().

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
 arch/x86/include/asm/coco.h        | 16 ++++++++++++++++
 arch/x86/kernel/cc_platform.c      | 29 +++++++++++++++++------------
 arch/x86/kernel/cpu/mshyperv.c     |  3 +++
 arch/x86/mm/mem_encrypt_identity.c |  8 +++++---
 4 files changed, 41 insertions(+), 15 deletions(-)
 create mode 100644 arch/x86/include/asm/coco.h

diff --git a/arch/x86/include/asm/coco.h b/arch/x86/include/asm/coco.h
new file mode 100644
index 000000000000..6e770e0dd683
--- /dev/null
+++ b/arch/x86/include/asm/coco.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_X86_COCO_H
+#define _ASM_X86_COCO_H
+
+#include <asm/pgtable_types.h>
+
+enum cc_vendor {
+	CC_VENDOR_NONE,
+	CC_VENDOR_AMD,
+	CC_VENDOR_HYPERV,
+	CC_VENDOR_INTEL,
+};
+
+void cc_init(enum cc_vendor);
+
+#endif /* _ASM_X86_COCO_H */
diff --git a/arch/x86/kernel/cc_platform.c b/arch/x86/kernel/cc_platform.c
index 6a6ffcd978f6..891d3074a16e 100644
--- a/arch/x86/kernel/cc_platform.c
+++ b/arch/x86/kernel/cc_platform.c
@@ -9,18 +9,15 @@
 
 #include <linux/export.h>
 #include <linux/cc_platform.h>
-#include <linux/mem_encrypt.h>
 
-#include <asm/mshyperv.h>
+#include <asm/coco.h>
 #include <asm/processor.h>
 
-static bool __maybe_unused intel_cc_platform_has(enum cc_attr attr)
+static enum cc_vendor cc_vendor;
+
+static bool intel_cc_platform_has(enum cc_attr attr)
 {
-#ifdef CONFIG_INTEL_TDX_GUEST
-	return false;
-#else
 	return false;
-#endif
 }
 
 /*
@@ -74,12 +71,20 @@ static bool hyperv_cc_platform_has(enum cc_attr attr)
 
 bool cc_platform_has(enum cc_attr attr)
 {
-	if (sme_me_mask)
+	switch (cc_vendor) {
+	case CC_VENDOR_AMD:
 		return amd_cc_platform_has(attr);
-
-	if (hv_is_isolation_supported())
+	case CC_VENDOR_INTEL:
+		return intel_cc_platform_has(attr);
+	case CC_VENDOR_HYPERV:
 		return hyperv_cc_platform_has(attr);
-
-	return false;
+	default:
+		return false;
+	}
 }
 EXPORT_SYMBOL_GPL(cc_platform_has);
+
+__init void cc_init(enum cc_vendor vendor)
+{
+	cc_vendor = vendor;
+}
diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
index 5a99f993e639..d77cf3a31f07 100644
--- a/arch/x86/kernel/cpu/mshyperv.c
+++ b/arch/x86/kernel/cpu/mshyperv.c
@@ -33,6 +33,7 @@
 #include <asm/nmi.h>
 #include <clocksource/hyperv_timer.h>
 #include <asm/numa.h>
+#include <asm/coco.h>
 
 /* Is Linux running as the root partition? */
 bool hv_root_partition;
@@ -344,6 +345,8 @@ static void __init ms_hyperv_init_platform(void)
 		 */
 		swiotlb_force = SWIOTLB_FORCE;
 #endif
+		if (hv_get_isolation_type() != HV_ISOLATION_TYPE_NONE)
+			cc_init(CC_VENDOR_HYPERV);
 	}
 
 	if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index 3f0abb403340..eb7fbd85b77e 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -44,6 +44,7 @@
 #include <asm/setup.h>
 #include <asm/sections.h>
 #include <asm/cmdline.h>
+#include <asm/coco.h>
 
 #include "mm_internal.h"
 
@@ -565,8 +566,7 @@ void __init sme_enable(struct boot_params *bp)
 	} else {
 		/* SEV state cannot be controlled by a command line option */
 		sme_me_mask = me_mask;
-		physical_mask &= ~sme_me_mask;
-		return;
+		goto out;
 	}
 
 	/*
@@ -600,6 +600,8 @@ void __init sme_enable(struct boot_params *bp)
 		sme_me_mask = 0;
 	else
 		sme_me_mask = active_by_default ? me_mask : 0;
-
+out:
 	physical_mask &= ~sme_me_mask;
+	if (sme_me_mask)
+		cc_init(CC_VENDOR_AMD);
 }
-- 
2.34.1


  reply	other threads:[~2022-02-19  0:12 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-18 16:16 [PATCHv3 00/32] TDX Guest: TDX core support Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 01/32] x86/mm: Fix warning on build with X86_MEM_ENCRYPT=y Kirill A. Shutemov
2022-02-18 19:39   ` Dave Hansen
2022-02-18 16:16 ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Kirill A. Shutemov
2022-02-18 20:36   ` Dave Hansen
2022-02-18 21:33     ` Kirill A. Shutemov
2022-02-18 21:58       ` Borislav Petkov
2022-02-19  0:13         ` Kirill A. Shutemov [this message]
2022-02-19  0:13           ` [PATCHv3.1 2.1/2] " Kirill A. Shutemov
2022-02-21 18:31             ` Tom Lendacky
2022-02-21 22:14               ` Kirill A. Shutemov
2022-02-21 21:05             ` Borislav Petkov
2022-02-21 22:10               ` Kirill A. Shutemov
2022-02-21 22:36                 ` Borislav Petkov
2022-02-21 23:25                   ` Kirill A. Shutemov
2022-02-22 13:31                     ` Borislav Petkov
2022-02-21 11:07           ` [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform Borislav Petkov
2022-02-21 11:44             ` Kirill A. Shutemov
2022-02-21 12:05               ` Borislav Petkov
2022-02-21 13:52             ` Wei Liu
2022-02-21 20:20               ` Borislav Petkov
2022-02-21 19:28       ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Dave Hansen
2022-02-21 19:49         ` Borislav Petkov
2022-02-21 22:21           ` Kirill A. Shutemov
2022-02-21 22:56             ` Borislav Petkov
2022-02-21 23:18               ` Kirill A. Shutemov
2022-02-22 13:28                 ` Borislav Petkov
2022-02-21 22:28         ` Kirill A. Shutemov
2022-02-22 11:03           ` Kirill A. Shutemov
2022-02-22 13:37             ` Borislav Petkov
2022-02-22 13:52               ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 03/32] x86/tdx: Detect running as a TDX guest in early boot Kirill A. Shutemov
2022-02-18 21:07   ` Dave Hansen
2022-02-20 15:01     ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 04/32] x86/tdx: Provide common base for SEAMCALL and TDCALL C wrappers Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 05/32] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 06/32] x86/tdx: Extend the confidential computing API to support TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 07/32] x86/tdx: Exclude shared bit from __PHYSICAL_MASK Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 08/32] x86/traps: Add #VE support for TDX guest Kirill A. Shutemov
2022-02-22  7:19   ` Dingji Li
2022-02-22 11:11     ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 09/32] x86/tdx: Add HLT support for TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 10/32] x86/tdx: Add MSR " Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 11/32] x86/tdx: Handle CPUID via #VE Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 12/32] x86/tdx: Handle in-kernel MMIO Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 13/32] x86/tdx: Detect TDX at early kernel decompression time Kirill A. Shutemov
2022-02-21 11:37   ` Cyrill Gorcunov
2022-02-21 13:53     ` Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 14/32] x86: Adjust types used in port I/O helpers Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 15/32] x86: Consolidate " Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 16/32] x86/boot: Allow to hook up alternative " Kirill A. Shutemov
2022-02-21 20:04   ` Tom Lendacky
2022-02-21 22:02     ` Kirill A. Shutemov
2022-02-22  1:25       ` Josh Poimboeuf
2022-02-18 16:17 ` [PATCHv3 17/32] x86/boot/compressed: Support TDX guest port I/O at decompression time Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 18/32] x86/tdx: Add port I/O emulation Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 19/32] x86/tdx: Handle early boot port I/O Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 20/32] x86/tdx: Wire up KVM hypercalls Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 21/32] x86/boot: Add a trampoline for booting APs via firmware handoff Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 22/32] x86/acpi, x86/boot: Add multiprocessor wake-up support Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 23/32] x86/boot: Set CR0.NE early and keep it set during the boot Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 24/32] x86/boot: Avoid #VE during boot for TDX platforms Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 25/32] x86/topology: Disable CPU online/offline control for TDX guests Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 26/32] x86/tdx: Make pages shared in ioremap() Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 27/32] x86/mm/cpa: Generailize __set_memory_enc_pgtable() Kirill A. Shutemov
2022-02-21 15:46   ` Brijesh Singh
2022-02-18 16:17 ` [PATCHv3 28/32] x86/mm/cpa: Add support for TDX shared memory Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 29/32] x86/kvm: Use bounce buffers for TD guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 30/32] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 31/32] ACPICA: Avoid cache flush on TDX guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 32/32] Documentation/x86: Document TDX kernel architecture Kirill A. Shutemov

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