From: Dave Hansen <dave.hansen@intel.com>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
luto@kernel.org, peterz@infradead.org
Cc: sathyanarayanan.kuppuswamy@linux.intel.com, aarcange@redhat.com,
ak@linux.intel.com, dan.j.williams@intel.com, david@redhat.com,
hpa@zytor.com, jgross@suse.com, jmattson@google.com,
joro@8bytes.org, jpoimboe@redhat.com, knsathya@kernel.org,
pbonzini@redhat.com, sdeep@vmware.com, seanjc@google.com,
tony.luck@intel.com, vkuznets@redhat.com, wanpengli@tencent.com,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv3 02/32] x86/coco: Add API to handle encryption mask
Date: Fri, 18 Feb 2022 12:36:02 -0800 [thread overview]
Message-ID: <66fcd7e7-deb6-f27e-9fc6-33293ce04f16@intel.com> (raw)
In-Reply-To: <20220218161718.67148-3-kirill.shutemov@linux.intel.com>
On 2/18/22 08:16, Kirill A. Shutemov wrote:
> +#ifdef CONFIG_ARCH_HAS_CC_PLATFORM
> +u64 cc_get_mask(bool enc);
> +u64 cc_mkenc(u64 val);
> +u64 cc_mkdec(u64 val);
> +#else
> +#define cc_get_mask(enc) 0
> +#define cc_mkenc(val) (val)
> +#define cc_mkdec(val) (val)
> +#endif
Is there a reason the stubs as #defines? Static inlines are preferred
for consistent type safety among other things.
It would also be nice to talk about the u64 type in the changelog. If I
remember right, there was a reason you didn't want to have a pgprot_t
here.
...
> @@ -74,12 +72,52 @@ static bool hyperv_cc_platform_has(enum cc_attr attr)
>
> bool cc_platform_has(enum cc_attr attr)
> {
> - if (sme_me_mask)
> + switch (cc_vendor) {
> + case CC_VENDOR_AMD:
> return amd_cc_platform_has(attr);
> -
> - if (hv_is_isolation_supported())
> + case CC_VENDOR_INTEL:
> + return intel_cc_platform_has(attr);
> + case CC_VENDOR_HYPERV:
> return hyperv_cc_platform_has(attr);
> -
> - return false;
> + default:
> + return false;
> + }
> }
> EXPORT_SYMBOL_GPL(cc_platform_has);
This patch is bordering on doing too many different things. Adding the
CC_VENDOR_*'s in a separate patch probably would have been nice, for
instance.
This wasn't really broached at all in the changelog.
> +u64 cc_get_mask(bool enc)
> +{
> + switch (cc_vendor) {
> + case CC_VENDOR_AMD:
> + return enc ? cc_mask : 0;
> + default:
> + return 0;
> + }
> +}
I had to ask myself why you need all three of these functions. It's
obvious _after_ reading the whole patch, but it left me wanting more in
the changelog about it.
> +u64 cc_mkenc(u64 val)
> +{
> + switch (cc_vendor) {
> + case CC_VENDOR_AMD:
> + return val | cc_mask;
> + default:
> + return val;
> + }
> +}
> +
> +u64 cc_mkdec(u64 val)
> +{
> + switch (cc_vendor) {
> + case CC_VENDOR_AMD:
> + return val & ~cc_mask;
> + default:
> + return val;
> + }
> +}
> +EXPORT_SYMBOL_GPL(cc_mkdec);
> +
> +__init void cc_init(enum cc_vendor vendor, u64 mask)
> +{
> + cc_vendor = vendor;
> + cc_mask = mask;
> +}
> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index 5a99f993e639..9af6be143998 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -33,6 +33,7 @@
> #include <asm/nmi.h>
> #include <clocksource/hyperv_timer.h>
> #include <asm/numa.h>
> +#include <asm/coco.h>
>
> /* Is Linux running as the root partition? */
> bool hv_root_partition;
> @@ -344,6 +345,8 @@ static void __init ms_hyperv_init_platform(void)
> */
> swiotlb_force = SWIOTLB_FORCE;
> #endif
> + if (hv_get_isolation_type() != HV_ISOLATION_TYPE_NONE)
> + cc_init(CC_VENDOR_HYPERV, 0);
> }
>
> if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
> diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
> index 3f0abb403340..fa758247ab57 100644
> --- a/arch/x86/mm/mem_encrypt_identity.c
> +++ b/arch/x86/mm/mem_encrypt_identity.c
> @@ -44,6 +44,7 @@
> #include <asm/setup.h>
> #include <asm/sections.h>
> #include <asm/cmdline.h>
> +#include <asm/coco.h>
>
> #include "mm_internal.h"
>
> @@ -565,8 +566,7 @@ void __init sme_enable(struct boot_params *bp)
> } else {
> /* SEV state cannot be controlled by a command line option */
> sme_me_mask = me_mask;
> - physical_mask &= ~sme_me_mask;
> - return;
> + goto out;
> }
>
> /*
> @@ -600,6 +600,8 @@ void __init sme_enable(struct boot_params *bp)
> sme_me_mask = 0;
> else
> sme_me_mask = active_by_default ? me_mask : 0;
> -
> +out:
> physical_mask &= ~sme_me_mask;
> + if (sme_me_mask)
> + cc_init(CC_VENDOR_AMD, sme_me_mask);
> }
I don't think you need to mop it up here, but where does this leave
sme_me_mask?
> diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c
> index b4072115c8ef..e79366b8a9da 100644
> --- a/arch/x86/mm/pat/set_memory.c
> +++ b/arch/x86/mm/pat/set_memory.c
> @@ -1999,8 +1999,8 @@ static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
> memset(&cpa, 0, sizeof(cpa));
> cpa.vaddr = &addr;
> cpa.numpages = numpages;
> - cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
> - cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
> + cpa.mask_set = __pgprot(cc_get_mask(enc));
> + cpa.mask_clr = __pgprot(cc_get_mask(!enc));
> cpa.pgd = init_mm.pgd;
>
> /* Must avoid aliasing mappings in the highmem code */
This actually ended up looking pretty nice. It was a real mess along
the way, but this makes me think this is a _good_ solution.
next prev parent reply other threads:[~2022-02-18 20:39 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 16:16 [PATCHv3 00/32] TDX Guest: TDX core support Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 01/32] x86/mm: Fix warning on build with X86_MEM_ENCRYPT=y Kirill A. Shutemov
2022-02-18 19:39 ` Dave Hansen
2022-02-18 16:16 ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Kirill A. Shutemov
2022-02-18 20:36 ` Dave Hansen [this message]
2022-02-18 21:33 ` Kirill A. Shutemov
2022-02-18 21:58 ` Borislav Petkov
2022-02-19 0:13 ` [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform Kirill A. Shutemov
2022-02-19 0:13 ` [PATCHv3.1 2.1/2] x86/coco: Add API to handle encryption mask Kirill A. Shutemov
2022-02-21 18:31 ` Tom Lendacky
2022-02-21 22:14 ` Kirill A. Shutemov
2022-02-21 21:05 ` Borislav Petkov
2022-02-21 22:10 ` Kirill A. Shutemov
2022-02-21 22:36 ` Borislav Petkov
2022-02-21 23:25 ` Kirill A. Shutemov
2022-02-22 13:31 ` Borislav Petkov
2022-02-21 11:07 ` [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform Borislav Petkov
2022-02-21 11:44 ` Kirill A. Shutemov
2022-02-21 12:05 ` Borislav Petkov
2022-02-21 13:52 ` Wei Liu
2022-02-21 20:20 ` Borislav Petkov
2022-02-21 19:28 ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Dave Hansen
2022-02-21 19:49 ` Borislav Petkov
2022-02-21 22:21 ` Kirill A. Shutemov
2022-02-21 22:56 ` Borislav Petkov
2022-02-21 23:18 ` Kirill A. Shutemov
2022-02-22 13:28 ` Borislav Petkov
2022-02-21 22:28 ` Kirill A. Shutemov
2022-02-22 11:03 ` Kirill A. Shutemov
2022-02-22 13:37 ` Borislav Petkov
2022-02-22 13:52 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 03/32] x86/tdx: Detect running as a TDX guest in early boot Kirill A. Shutemov
2022-02-18 21:07 ` Dave Hansen
2022-02-20 15:01 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 04/32] x86/tdx: Provide common base for SEAMCALL and TDCALL C wrappers Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 05/32] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 06/32] x86/tdx: Extend the confidential computing API to support TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 07/32] x86/tdx: Exclude shared bit from __PHYSICAL_MASK Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 08/32] x86/traps: Add #VE support for TDX guest Kirill A. Shutemov
2022-02-22 7:19 ` Dingji Li
2022-02-22 11:11 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 09/32] x86/tdx: Add HLT support for TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 10/32] x86/tdx: Add MSR " Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 11/32] x86/tdx: Handle CPUID via #VE Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 12/32] x86/tdx: Handle in-kernel MMIO Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 13/32] x86/tdx: Detect TDX at early kernel decompression time Kirill A. Shutemov
2022-02-21 11:37 ` Cyrill Gorcunov
2022-02-21 13:53 ` Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 14/32] x86: Adjust types used in port I/O helpers Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 15/32] x86: Consolidate " Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 16/32] x86/boot: Allow to hook up alternative " Kirill A. Shutemov
2022-02-21 20:04 ` Tom Lendacky
2022-02-21 22:02 ` Kirill A. Shutemov
2022-02-22 1:25 ` Josh Poimboeuf
2022-02-18 16:17 ` [PATCHv3 17/32] x86/boot/compressed: Support TDX guest port I/O at decompression time Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 18/32] x86/tdx: Add port I/O emulation Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 19/32] x86/tdx: Handle early boot port I/O Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 20/32] x86/tdx: Wire up KVM hypercalls Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 21/32] x86/boot: Add a trampoline for booting APs via firmware handoff Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 22/32] x86/acpi, x86/boot: Add multiprocessor wake-up support Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 23/32] x86/boot: Set CR0.NE early and keep it set during the boot Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 24/32] x86/boot: Avoid #VE during boot for TDX platforms Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 25/32] x86/topology: Disable CPU online/offline control for TDX guests Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 26/32] x86/tdx: Make pages shared in ioremap() Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 27/32] x86/mm/cpa: Generailize __set_memory_enc_pgtable() Kirill A. Shutemov
2022-02-21 15:46 ` Brijesh Singh
2022-02-18 16:17 ` [PATCHv3 28/32] x86/mm/cpa: Add support for TDX shared memory Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 29/32] x86/kvm: Use bounce buffers for TD guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 30/32] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 31/32] ACPICA: Avoid cache flush on TDX guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 32/32] Documentation/x86: Document TDX kernel architecture Kirill A. Shutemov
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