From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "Kirill A. Shutemov" <kirill@shutemov.name>,
aarcange@redhat.com, ak@linux.intel.com,
dan.j.williams@intel.com, dave.hansen@intel.com,
david@redhat.com, hpa@zytor.com, jgross@suse.com,
jmattson@google.com, joro@8bytes.org, jpoimboe@redhat.com,
knsathya@kernel.org, linux-kernel@vger.kernel.org,
luto@kernel.org, mingo@redhat.com, pbonzini@redhat.com,
peterz@infradead.org, sathyanarayanan.kuppuswamy@linux.intel.com,
sdeep@vmware.com, seanjc@google.com, tglx@linutronix.de,
tony.luck@intel.com, vkuznets@redhat.com, wanpengli@tencent.com,
x86@kernel.org, linux-hyperv@vger.kernel.org,
Brijesh Singh <brijesh.singh@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Tianyu Lan <Tianyu.Lan@microsoft.com>
Subject: Re: [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform
Date: Mon, 21 Feb 2022 14:44:51 +0300 [thread overview]
Message-ID: <20220221114451.mljggcmadgvrrxbv@black.fi.intel.com> (raw)
In-Reply-To: <YhNyY5ErqQHZ961+@zn.tnic>
On Mon, Feb 21, 2022 at 12:07:15PM +0100, Borislav Petkov wrote:
> On Sat, Feb 19, 2022 at 03:13:04AM +0300, Kirill A. Shutemov wrote:
> > diff --git a/arch/x86/kernel/cc_platform.c b/arch/x86/kernel/cc_platform.c
> > index 6a6ffcd978f6..891d3074a16e 100644
> > --- a/arch/x86/kernel/cc_platform.c
> > +++ b/arch/x86/kernel/cc_platform.c
> > @@ -9,18 +9,15 @@
> >
> > #include <linux/export.h>
> > #include <linux/cc_platform.h>
> > -#include <linux/mem_encrypt.h>
> >
> > -#include <asm/mshyperv.h>
> > +#include <asm/coco.h>
> > #include <asm/processor.h>
> >
> > -static bool __maybe_unused intel_cc_platform_has(enum cc_attr attr)
> > +static enum cc_vendor cc_vendor;
>
> static enum cc_vendor vendor __ro_after_init;
Hm. Isn't 'vendor' too generic? It may lead to name conflict in the
future.
What is wrong with cc_vendor here? I noticed that you don't like name of
a variable to match type name. Why?
> > @@ -344,6 +345,8 @@ static void __init ms_hyperv_init_platform(void)
> > */
> > swiotlb_force = SWIOTLB_FORCE;
> > #endif
> > + if (hv_get_isolation_type() != HV_ISOLATION_TYPE_NONE)
> > + cc_init(CC_VENDOR_HYPERV);
>
> Isn't that supposed to test HV_ISOLATION_TYPE_SNP instead?
Currently cc_platform_has() relies on hv_is_isolation_supported() which
checks for !HV_ISOLATION_TYPE_NONE. This is direct transfer to the new
scheme. It might be wrong, but it is not regression.
> I mean, I have no clue what HV_ISOLATION_TYPE_VBS is. It is not used
> anywhere in the tree either.
>
> a6c76bb08dc7 ("x86/hyperv: Load/save the Isolation Configuration leaf")
> calls it "'VBS' (software-based isolation)" - whatever that means - so
> I'm not sure that is going to need the cc-facilities.
>
> For stuff like that you need to use get_maintainers.pl and Cc them
> folks:
>
> $ git log -p -1 | ./scripts/get_maintainer.pl | grep -i hyper
> "K. Y. Srinivasan" <kys@microsoft.com> (supporter:Hyper-V/Azure CORE AND DRIVERS)
> Haiyang Zhang <haiyangz@microsoft.com> (supporter:Hyper-V/Azure CORE AND DRIVERS)
> Stephen Hemminger <sthemmin@microsoft.com> (supporter:Hyper-V/Azure CORE AND DRIVERS)
> Wei Liu <wei.liu@kernel.org> (supporter:Hyper-V/Azure CORE AND DRIVERS,commit_signer:1/4=25%)
> Dexuan Cui <decui@microsoft.com> (supporter:Hyper-V/Azure CORE AND DRIVERS)
> linux-hyperv@vger.kernel.org (open list:Hyper-V/Azure CORE AND DRIVERS)
>
> /me adds the ML to Cc.
+Tianyu, who brought HyperV cc_platform_has().
Speaking about HyperV, moving to scheme with cc_init() revealed that
HyperV never selected ARCH_HAS_CC_PLATFORM. Now it leads to build failure
if AMD memory encryption is not enabled:
ld: arch/x86/kernel/cpu/mshyperv.o: in function `ms_hyperv_init_platform':
mshyperv.c:(.init.text+0x297): undefined reference to `cc_init'
Maybe something like this:
diff --git a/drivers/hv/Kconfig b/drivers/hv/Kconfig
index 0747a8f1fcee..574ea80601e9 100644
--- a/drivers/hv/Kconfig
+++ b/drivers/hv/Kconfig
@@ -8,6 +8,7 @@ config HYPERV
|| (ARM64 && !CPU_BIG_ENDIAN))
select PARAVIRT
select X86_HV_CALLBACK_VECTOR if X86
+ select ARCH_HAS_CC_PLATFORM if X86
select VMAP_PFN
help
Select this option to run Linux as a Hyper-V client operating
Again, it is pre-existing issue. It only escalated to build failure.
> > if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
> > diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
> > index 3f0abb403340..eb7fbd85b77e 100644
> > --- a/arch/x86/mm/mem_encrypt_identity.c
> > +++ b/arch/x86/mm/mem_encrypt_identity.c
> > @@ -44,6 +44,7 @@
> > #include <asm/setup.h>
> > #include <asm/sections.h>
> > #include <asm/cmdline.h>
> > +#include <asm/coco.h>
> >
> > #include "mm_internal.h"
> >
> > @@ -565,8 +566,7 @@ void __init sme_enable(struct boot_params *bp)
> > } else {
> > /* SEV state cannot be controlled by a command line option */
> > sme_me_mask = me_mask;
> > - physical_mask &= ~sme_me_mask;
> > - return;
> > + goto out;
> > }
> >
> > /*
> > @@ -600,6 +600,8 @@ void __init sme_enable(struct boot_params *bp)
> > sme_me_mask = 0;
> > else
> > sme_me_mask = active_by_default ? me_mask : 0;
> > -
> > +out:
> > physical_mask &= ~sme_me_mask;
> > + if (sme_me_mask)
> > + cc_init(CC_VENDOR_AMD);
> > }
>
> I guess.
>
> Adding SEV folks to Cc too.
>
> Please use get_maintainer.pl - you should know that - you're not some
> newbie who started doing kernel work two weeks ago.
Sorry, will do.
--
Kirill A. Shutemov
next prev parent reply other threads:[~2022-02-21 11:44 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-18 16:16 [PATCHv3 00/32] TDX Guest: TDX core support Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 01/32] x86/mm: Fix warning on build with X86_MEM_ENCRYPT=y Kirill A. Shutemov
2022-02-18 19:39 ` Dave Hansen
2022-02-18 16:16 ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Kirill A. Shutemov
2022-02-18 20:36 ` Dave Hansen
2022-02-18 21:33 ` Kirill A. Shutemov
2022-02-18 21:58 ` Borislav Petkov
2022-02-19 0:13 ` [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform Kirill A. Shutemov
2022-02-19 0:13 ` [PATCHv3.1 2.1/2] x86/coco: Add API to handle encryption mask Kirill A. Shutemov
2022-02-21 18:31 ` Tom Lendacky
2022-02-21 22:14 ` Kirill A. Shutemov
2022-02-21 21:05 ` Borislav Petkov
2022-02-21 22:10 ` Kirill A. Shutemov
2022-02-21 22:36 ` Borislav Petkov
2022-02-21 23:25 ` Kirill A. Shutemov
2022-02-22 13:31 ` Borislav Petkov
2022-02-21 11:07 ` [PATCHv3.1 2/32] x86/coco: Explicitly declare type of confidential computing platform Borislav Petkov
2022-02-21 11:44 ` Kirill A. Shutemov [this message]
2022-02-21 12:05 ` Borislav Petkov
2022-02-21 13:52 ` Wei Liu
2022-02-21 20:20 ` Borislav Petkov
2022-02-21 19:28 ` [PATCHv3 02/32] x86/coco: Add API to handle encryption mask Dave Hansen
2022-02-21 19:49 ` Borislav Petkov
2022-02-21 22:21 ` Kirill A. Shutemov
2022-02-21 22:56 ` Borislav Petkov
2022-02-21 23:18 ` Kirill A. Shutemov
2022-02-22 13:28 ` Borislav Petkov
2022-02-21 22:28 ` Kirill A. Shutemov
2022-02-22 11:03 ` Kirill A. Shutemov
2022-02-22 13:37 ` Borislav Petkov
2022-02-22 13:52 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 03/32] x86/tdx: Detect running as a TDX guest in early boot Kirill A. Shutemov
2022-02-18 21:07 ` Dave Hansen
2022-02-20 15:01 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 04/32] x86/tdx: Provide common base for SEAMCALL and TDCALL C wrappers Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 05/32] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 06/32] x86/tdx: Extend the confidential computing API to support TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 07/32] x86/tdx: Exclude shared bit from __PHYSICAL_MASK Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 08/32] x86/traps: Add #VE support for TDX guest Kirill A. Shutemov
2022-02-22 7:19 ` Dingji Li
2022-02-22 11:11 ` Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 09/32] x86/tdx: Add HLT support for TDX guests Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 10/32] x86/tdx: Add MSR " Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 11/32] x86/tdx: Handle CPUID via #VE Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 12/32] x86/tdx: Handle in-kernel MMIO Kirill A. Shutemov
2022-02-18 16:16 ` [PATCHv3 13/32] x86/tdx: Detect TDX at early kernel decompression time Kirill A. Shutemov
2022-02-21 11:37 ` Cyrill Gorcunov
2022-02-21 13:53 ` Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 14/32] x86: Adjust types used in port I/O helpers Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 15/32] x86: Consolidate " Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 16/32] x86/boot: Allow to hook up alternative " Kirill A. Shutemov
2022-02-21 20:04 ` Tom Lendacky
2022-02-21 22:02 ` Kirill A. Shutemov
2022-02-22 1:25 ` Josh Poimboeuf
2022-02-18 16:17 ` [PATCHv3 17/32] x86/boot/compressed: Support TDX guest port I/O at decompression time Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 18/32] x86/tdx: Add port I/O emulation Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 19/32] x86/tdx: Handle early boot port I/O Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 20/32] x86/tdx: Wire up KVM hypercalls Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 21/32] x86/boot: Add a trampoline for booting APs via firmware handoff Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 22/32] x86/acpi, x86/boot: Add multiprocessor wake-up support Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 23/32] x86/boot: Set CR0.NE early and keep it set during the boot Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 24/32] x86/boot: Avoid #VE during boot for TDX platforms Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 25/32] x86/topology: Disable CPU online/offline control for TDX guests Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 26/32] x86/tdx: Make pages shared in ioremap() Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 27/32] x86/mm/cpa: Generailize __set_memory_enc_pgtable() Kirill A. Shutemov
2022-02-21 15:46 ` Brijesh Singh
2022-02-18 16:17 ` [PATCHv3 28/32] x86/mm/cpa: Add support for TDX shared memory Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 29/32] x86/kvm: Use bounce buffers for TD guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 30/32] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 31/32] ACPICA: Avoid cache flush on TDX guest Kirill A. Shutemov
2022-02-18 16:17 ` [PATCHv3 32/32] Documentation/x86: Document TDX kernel architecture Kirill A. Shutemov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220221114451.mljggcmadgvrrxbv@black.fi.intel.com \
--to=kirill.shutemov@linux.intel.com \
--cc=Tianyu.Lan@microsoft.com \
--cc=aarcange@redhat.com \
--cc=ak@linux.intel.com \
--cc=bp@alien8.de \
--cc=brijesh.singh@amd.com \
--cc=dan.j.williams@intel.com \
--cc=dave.hansen@intel.com \
--cc=david@redhat.com \
--cc=hpa@zytor.com \
--cc=jgross@suse.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=jpoimboe@redhat.com \
--cc=kirill@shutemov.name \
--cc=knsathya@kernel.org \
--cc=linux-hyperv@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=luto@kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
--cc=sdeep@vmware.com \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=thomas.lendacky@amd.com \
--cc=tony.luck@intel.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®