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From: Leo Yan <leo.yan@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v1 5/9] coresight: Avoid enable programming clock duplicately
Date: Tue, 22 Apr 2025 13:24:14 +0100	[thread overview]
Message-ID: <20250422122414.GE28953@e132581.arm.com> (raw)
In-Reply-To: <5a8aaa17-cc36-4e03-95b3-24c3a16dd987@arm.com>

On Thu, Apr 03, 2025 at 12:18:56PM +0530, Anshuman Khandual wrote:
> On 3/27/25 17:07, Leo Yan wrote:
> > The programming clock is enabled by AMBA bus driver before a dynamic
> > probe.  As a result, a CoreSight driver may redundantly enable the same
> > clock.
> > 
> > To avoid this, add a check for device type and skip enabling the
> > programming clock for AMBA devices.  The returned NULL pointer will be
> > tolerated by the drivers.
> > 
> > Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver for MMIO devices")
> > Signed-off-by: Leo Yan <leo.yan@arm.com>
> > ---
> >  include/linux/coresight.h | 11 +++++++----
> >  1 file changed, 7 insertions(+), 4 deletions(-)
> > 
> > diff --git a/include/linux/coresight.h b/include/linux/coresight.h
> > index b888f6ed59b2..26eb4a61b992 100644
> > --- a/include/linux/coresight.h
> > +++ b/include/linux/coresight.h
> > @@ -476,15 +476,18 @@ static inline bool is_coresight_device(void __iomem *base)
> >   * Returns:
> >   *
> >   * clk   - Clock is found and enabled
> > + * NULL  - Clock is not needed as it is managed by the AMBA bus driver
> >   * ERROR - Clock is found but failed to enable
> >   */
> >  static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev)
> >  {
> > -	struct clk *pclk;
> > +	struct clk *pclk = NULL;
> >  
> > -	pclk = devm_clk_get_enabled(dev, "apb_pclk");
> > -	if (IS_ERR(pclk))
> > -		pclk = devm_clk_get_enabled(dev, "apb");
> > +	if (!dev_is_amba(dev)) {
> > +		pclk = devm_clk_get_enabled(dev, "apb_pclk");
> > +		if (IS_ERR(pclk))
> > +			pclk = devm_clk_get_enabled(dev, "apb");
> > +	}
> >  
> >  	return pclk;
> >  }
> 
> coresight_get_enable_apb_pclk() mostly gets called in the platform driver
> probe paths but they are also present in some AMBA probe paths. Hence why
> cannot the callers in AMBA probe paths get fixed instead ?

With this approach, clocking operations are different in static probe
and dynamic probe.  This causes complexity for CoreSight drivers.

After consideration, we decided to use a central place for clock
initialization.  Patch 09 follows the idea to encapsulate pclk and atclk
operations in the coresight_get_enable_clocks() function.

> Besides return
> value never gets checked for NULL, which would have to be changed as well
> if coresight_get_enable_apb_pclk() starts returning NULL values for AMBA
> devices.
> 
> 	drvdata->pclk = coresight_get_enable_apb_pclk(&pdev->dev);
> 	if (IS_ERR(drvdata->pclk))
> 		return -ENODEV;

I confirmed CoreSight drivers have used this condition, so it is safe
to return NULL pointer from coresight_get_enable_apb_pclk().

Thanks,
Leo

  reply	other threads:[~2025-04-22 12:24 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-27 11:37 [PATCH v1 0/9] coresight: Fix and improve clock usage Leo Yan
2025-03-27 11:37 ` [PATCH v1 1/9] coresight: tmc: Support atclk Leo Yan
2025-04-03  5:50   ` Anshuman Khandual
2025-04-22  8:21     ` Leo Yan
2025-03-27 11:37 ` [PATCH v1 2/9] coresight: catu: " Leo Yan
2025-04-03  6:02   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 3/9] coresight: etm4x: " Leo Yan
2025-04-03  6:23   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 4/9] coresight: Disable programming clock properly Leo Yan
2025-03-27 11:37 ` [PATCH v1 5/9] coresight: Avoid enable programming clock duplicately Leo Yan
2025-04-03  6:48   ` Anshuman Khandual
2025-04-22 12:24     ` Leo Yan [this message]
2025-03-27 11:38 ` [PATCH v1 6/9] coresight: Disable trace bus clock properly Leo Yan
2025-04-03  7:25   ` Anshuman Khandual
2025-04-22 12:29     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 7/9] coresight: Make clock sequence consistent Leo Yan
2025-04-03  7:10   ` Anshuman Khandual
2025-04-22  9:21     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 8/9] coresight: Refactor runtime PM Leo Yan
2025-03-27 11:38 ` [PATCH v1 9/9] coresight: Consolidate clock enabling Leo Yan
2025-04-01 14:58   ` James Clark
2025-04-01 15:29     ` Leo Yan
2025-04-02  0:55     ` Jie Gan
2025-04-02  9:01       ` Leo Yan
2025-04-03  0:29         ` Jie Gan

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