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From: Anshuman Khandual <anshuman.khandual@arm.com>
To: Leo Yan <leo.yan@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v1 1/9] coresight: tmc: Support atclk
Date: Thu, 3 Apr 2025 11:20:38 +0530	[thread overview]
Message-ID: <b409c701-f126-4e07-ba14-75280529689b@arm.com> (raw)
In-Reply-To: <20250327113803.1452108-2-leo.yan@arm.com>

On 3/27/25 17:07, Leo Yan wrote:
> The atclk is an optional clock for the CoreSight TMC, but the driver
> misses to initialize it.  In most cases, the TMC shares the same atclk

TMC shares the atclk or pclk clock with other coresight components ?

> with other CoreSight components.  Since these components enable the
> clock before the TMC device is initialized, the TMC continues properly,
> which is why we don’t observe any lockup issues.
> 
> This change enables atclk in probe of the TMC driver.  Given the clock
> is optional, it is possible to return NULL if the clock does not exist.
> IS_ERR() is tolerant for this case.

Makes sense.

> 
> Dynamically disable and enable atclk during suspend and resume.  The
> clock pointers will never be error values if the driver has successfully
> probed, and the case of a NULL pointer case will be handled by the clock
> core layer.  The driver data is always valid after probe. Therefore,
> remove the related checks.  Also in the resume flow adds error handling.

Probably a good clean up.

> 
> Fixes: bc4bf7fe98da ("coresight-tmc: add CoreSight TMC driver")

Right commit to attribute.

> Signed-off-by: Leo Yan <leo.yan@arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-tmc-core.c | 22 +++++++++++++++++-----
>  drivers/hwtracing/coresight/coresight-tmc.h      |  2 ++
>  2 files changed, 19 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c
> index 5978bcda2556..6aad2acd0378 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-core.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c
> @@ -789,6 +789,10 @@ static int __tmc_probe(struct device *dev, struct resource *res)
>  	struct coresight_desc desc = { 0 };
>  	struct coresight_dev_list *dev_list = NULL;
>  
> +	drvdata->atclk = devm_clk_get_optional_enabled(dev, "atclk");
> +	if (IS_ERR(drvdata->atclk))
> +		return PTR_ERR(drvdata->atclk);
> +

Adding this check here in __tmc_probe() ensures that it gets called
both during AMBA and platform probe methods.

>  	ret = -ENOMEM;
>  
>  	/* Validity for the resource is already checked by the AMBA core */
> @@ -1019,18 +1023,26 @@ static int tmc_runtime_suspend(struct device *dev)
>  {
>  	struct tmc_drvdata *drvdata = dev_get_drvdata(dev);
>  
> -	if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk))
> -		clk_disable_unprepare(drvdata->pclk);
> +	clk_disable_unprepare(drvdata->atclk);
> +	clk_disable_unprepare(drvdata->pclk);
> +
>  	return 0;
>  }
>  
>  static int tmc_runtime_resume(struct device *dev)
>  {
>  	struct tmc_drvdata *drvdata = dev_get_drvdata(dev);
> +	int ret;
>  
> -	if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk))
> -		clk_prepare_enable(drvdata->pclk);
> -	return 0;
> +	ret = clk_prepare_enable(drvdata->pclk);
> +	if (ret)
> +		return ret;
> +
> +	ret = clk_prepare_enable(drvdata->atclk);
> +	if (ret)
> +		clk_disable_unprepare(drvdata->pclk);
> +
> +	return ret;
>  }
>  #endif
>  
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
> index 6541a27a018e..cbb4ba439158 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.h
> +++ b/drivers/hwtracing/coresight/coresight-tmc.h
> @@ -210,6 +210,7 @@ struct tmc_resrv_buf {
>  
>  /**
>   * struct tmc_drvdata - specifics associated to an TMC component
> + * @atclk:	optional clock for the core parts of the TMC.
>   * @pclk:	APB clock if present, otherwise NULL
>   * @base:	memory mapped base address for this component.
>   * @csdev:	component vitals needed by the framework.
> @@ -244,6 +245,7 @@ struct tmc_resrv_buf {
>   *		 Used by ETR/ETF.
>   */
>  struct tmc_drvdata {
> +	struct clk		*atclk;
>  	struct clk		*pclk;
>  	void __iomem		*base;
>  	struct coresight_device	*csdev;

Otherwise, LGTM.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>

  reply	other threads:[~2025-04-03  5:50 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-27 11:37 [PATCH v1 0/9] coresight: Fix and improve clock usage Leo Yan
2025-03-27 11:37 ` [PATCH v1 1/9] coresight: tmc: Support atclk Leo Yan
2025-04-03  5:50   ` Anshuman Khandual [this message]
2025-04-22  8:21     ` Leo Yan
2025-03-27 11:37 ` [PATCH v1 2/9] coresight: catu: " Leo Yan
2025-04-03  6:02   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 3/9] coresight: etm4x: " Leo Yan
2025-04-03  6:23   ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 4/9] coresight: Disable programming clock properly Leo Yan
2025-03-27 11:37 ` [PATCH v1 5/9] coresight: Avoid enable programming clock duplicately Leo Yan
2025-04-03  6:48   ` Anshuman Khandual
2025-04-22 12:24     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 6/9] coresight: Disable trace bus clock properly Leo Yan
2025-04-03  7:25   ` Anshuman Khandual
2025-04-22 12:29     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 7/9] coresight: Make clock sequence consistent Leo Yan
2025-04-03  7:10   ` Anshuman Khandual
2025-04-22  9:21     ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 8/9] coresight: Refactor runtime PM Leo Yan
2025-03-27 11:38 ` [PATCH v1 9/9] coresight: Consolidate clock enabling Leo Yan
2025-04-01 14:58   ` James Clark
2025-04-01 15:29     ` Leo Yan
2025-04-02  0:55     ` Jie Gan
2025-04-02  9:01       ` Leo Yan
2025-04-03  0:29         ` Jie Gan

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