From: Jie Gan <quic_jiegan@quicinc.com>
To: James Clark <james.clark@linaro.org>, Leo Yan <leo.yan@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<coresight@lists.linaro.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH v1 9/9] coresight: Consolidate clock enabling
Date: Wed, 2 Apr 2025 08:55:51 +0800 [thread overview]
Message-ID: <8a34b1ac-5681-4cd8-b960-a154d8678fa2@quicinc.com> (raw)
In-Reply-To: <b9046586-c884-484f-a308-9f256d3d99f5@linaro.org>
On 4/1/2025 10:58 PM, James Clark wrote:
>
>
> On 27/03/2025 11:38 am, Leo Yan wrote:
>> CoreSight drivers enable pclk and atclk conditionally. For example,
>> pclk is only enabled in the static probe, while atclk is an optional
>> clock that it is enabled for both dynamic and static probes, if it is
>> present. In the current CoreSight drivers, these two clocks are
>> initialized separately. This causes complex and duplicate codes.
>>
>> This patch consolidates clock enabling into a central place. It renames
>> coresight_get_enable_apb_pclk() to coresight_get_enable_clocks() and
>> encapsulates clock initialization logic:
>>
>> - If a clock is initialized successfully, its clock pointer is assigned
>> to the double pointer passed as an argument.
>> - If pclk is skipped for an AMBA device, or if atclk is not found, the
>> corresponding double pointer is set to NULL. The function returns
>> Success (0) to guide callers can proceed with no error.
>> - Otherwise, an error number is returned for failures.
>>
>> CoreSight drivers are refined so that clocks are initialized in one go.
>> As a result, driver data no longer needs to be allocated separately in
>> the static and dynamic probes. Moved the allocation into a low-level
>> function to avoid code duplication.
>>
>> Suggested-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Signed-off-by: Leo Yan <leo.yan@arm.com>
>> ---
>> drivers/hwtracing/coresight/coresight-catu.c | 30 +++++++++
>> +--------------------
>> drivers/hwtracing/coresight/coresight-cpu-debug.c | 29 ++++++++++
>> +------------------
>> drivers/hwtracing/coresight/coresight-ctcu-core.c | 8 ++++----
>> drivers/hwtracing/coresight/coresight-etm4x-core.c | 11 ++++-------
>> drivers/hwtracing/coresight/coresight-funnel.c | 11 ++++-------
>> drivers/hwtracing/coresight/coresight-replicator.c | 11 ++++-------
>> drivers/hwtracing/coresight/coresight-stm.c | 9 +++------
>> drivers/hwtracing/coresight/coresight-tmc-core.c | 30 +++++++++
>> +--------------------
>> drivers/hwtracing/coresight/coresight-tpiu.c | 10 ++++------
>> include/linux/coresight.h | 38 ++++++++++++
>> +++++++++++++++-----------
>> 10 files changed, 81 insertions(+), 106 deletions(-)
>>
> [...]
>> diff --git a/include/linux/coresight.h b/include/linux/coresight.h
>> index 26eb4a61b992..cf3fbbc0076a 100644
>> --- a/include/linux/coresight.h
>> +++ b/include/linux/coresight.h
>> @@ -471,25 +471,41 @@ static inline bool is_coresight_device(void
>> __iomem *base)
>> }
>> /*
>> - * Attempt to find and enable "APB clock" for the given device
>> + * Attempt to find and enable programming clock (pclk) and trace
>> clock (atclk)
>> + * for the given device.
>> *
>> - * Returns:
>> + * The AMBA bus driver will cover the pclk, to avoid duplicate
>> operations,
>> + * skip to get and enable the pclk for an AMBA device.
>> *
>> - * clk - Clock is found and enabled
>> - * NULL - Clock is not needed as it is managed by the AMBA bus driver
>> - * ERROR - Clock is found but failed to enable
>> + * atclk is an optional clock, it will be only enabled when it is
>> existed.
>> + * Otherwise, a NULL pointer will be returned to caller.
>> + *
>> + * Returns: '0' on Success; Error code otherwise.
>> */
>> -static inline struct clk *coresight_get_enable_apb_pclk(struct device
>> *dev)
>> +static inline int coresight_get_enable_clocks(struct device *dev,
>> + struct clk **pclk,
>> + struct clk **atclk)
>
> This function has grown a bit now, probably best to remove it from the
> header and export it instead.
>
>> {
>> - struct clk *pclk = NULL;
>> + WARN_ON(!pclk);
>> if (!dev_is_amba(dev)) {
>> - pclk = devm_clk_get_enabled(dev, "apb_pclk");
>> - if (IS_ERR(pclk))
>> - pclk = devm_clk_get_enabled(dev, "apb");
>> + *pclk = devm_clk_get_enabled(dev, "apb_pclk");
>> + if (IS_ERR(*pclk))
>> + *pclk = devm_clk_get_enabled(dev, "apb");
>> + if (IS_ERR(*pclk))
>> + return PTR_ERR(*pclk);
>> + } else {
>> + /* Don't enable pclk for an AMBA device */
>> + *pclk = NULL;
>
> Now the "apb" clock won't be enabled for amba devices. I'm assuming
> that's fine if the clock was always called "apb_pclk" for them, but the
> commit that added the new clock name didn't specify any special casing
> either.
>
> Can we have a comment that says it's deliberate? But the more I think
> about it the more I'm confused why CTCU needed a different clock name to
> be defined, when all the other Coresight devices use "apb_pclk".
Hi James,
The original clock-name for CTCU is apb_pclk, but the dt-binding
maintainer request me to change it to apb, that's why the clock name is
different from others.
I am not why we need apb instead of apb_pclk in dt-binding. Maybe some
rules have changed for dt-binding requirement.
Thanks,
Jie
>
>> }
>> - return pclk;
>> + if (atclk) {
>> + *atclk = devm_clk_get_optional_enabled(dev, "atclk");
>> + if (IS_ERR(*atclk))
>> + return PTR_ERR(*atclk);
>> + }
>> +
>> + return 0;
>> }
>> #define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4))
>
next prev parent reply other threads:[~2025-04-02 0:56 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-27 11:37 [PATCH v1 0/9] coresight: Fix and improve clock usage Leo Yan
2025-03-27 11:37 ` [PATCH v1 1/9] coresight: tmc: Support atclk Leo Yan
2025-04-03 5:50 ` Anshuman Khandual
2025-04-22 8:21 ` Leo Yan
2025-03-27 11:37 ` [PATCH v1 2/9] coresight: catu: " Leo Yan
2025-04-03 6:02 ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 3/9] coresight: etm4x: " Leo Yan
2025-04-03 6:23 ` Anshuman Khandual
2025-03-27 11:37 ` [PATCH v1 4/9] coresight: Disable programming clock properly Leo Yan
2025-03-27 11:37 ` [PATCH v1 5/9] coresight: Avoid enable programming clock duplicately Leo Yan
2025-04-03 6:48 ` Anshuman Khandual
2025-04-22 12:24 ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 6/9] coresight: Disable trace bus clock properly Leo Yan
2025-04-03 7:25 ` Anshuman Khandual
2025-04-22 12:29 ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 7/9] coresight: Make clock sequence consistent Leo Yan
2025-04-03 7:10 ` Anshuman Khandual
2025-04-22 9:21 ` Leo Yan
2025-03-27 11:38 ` [PATCH v1 8/9] coresight: Refactor runtime PM Leo Yan
2025-03-27 11:38 ` [PATCH v1 9/9] coresight: Consolidate clock enabling Leo Yan
2025-04-01 14:58 ` James Clark
2025-04-01 15:29 ` Leo Yan
2025-04-02 0:55 ` Jie Gan [this message]
2025-04-02 9:01 ` Leo Yan
2025-04-03 0:29 ` Jie Gan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8a34b1ac-5681-4cd8-b960-a154d8678fa2@quicinc.com \
--to=quic_jiegan@quicinc.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexandre.torgue@foss.st.com \
--cc=anshuman.khandual@arm.com \
--cc=coresight@lists.linaro.org \
--cc=gregkh@linuxfoundation.org \
--cc=james.clark@linaro.org \
--cc=leo.yan@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=mike.leach@linaro.org \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®