From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"H. Peter Anvin" <hpa@zytor.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>,
"Ahmed S. Darwish" <darwi@linutronix.de>
Subject: [PATCH v1 01/26] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.4
Date: Tue, 6 May 2025 07:04:12 +0200 [thread overview]
Message-ID: <20250506050437.10264-2-darwi@linutronix.de> (raw)
In-Reply-To: <20250506050437.10264-1-darwi@linutronix.de>
Update kcpuid's CSV file to version 2.4, as generated by x86-cpuid-db.
Summary of the v2.4 changes:
* Mark CPUID(0x80000001) EDX:23 bit, 'e_mmx', as not exclusive to
Transmeta since it is supported by AMD as well.
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Link: https://gitlab.com/x86-cpuid.org/x86-cpuid-db/-/blob/v2.4/CHANGELOG.rst
---
tools/arch/x86/kcpuid/cpuid.csv | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv
index 8d25b0b49f3b..8d925ce9750f 100644
--- a/tools/arch/x86/kcpuid/cpuid.csv
+++ b/tools/arch/x86/kcpuid/cpuid.csv
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: CC0-1.0
-# Generator: x86-cpuid-db v2.3
+# Generator: x86-cpuid-db v2.4
#
# Auto-generated file.
@@ -689,7 +689,7 @@
0x80000001, 0, edx, 19, mp , Out-of-spec AMD Multiprocessing bit
0x80000001, 0, edx, 20, nx , No-execute page protection
0x80000001, 0, edx, 22, mmxext , AMD MMX extensions
-0x80000001, 0, edx, 23, e_mmx , MMX instructions (Transmeta)
+0x80000001, 0, edx, 23, e_mmx , MMX instructions
0x80000001, 0, edx, 24, e_fxsr , FXSAVE and FXRSTOR instructions
0x80000001, 0, edx, 25, fxsr_opt , FXSAVE and FXRSTOR optimizations
0x80000001, 0, edx, 26, pdpe1gb , 1-GB large page support
--
2.49.0
next prev parent reply other threads:[~2025-05-06 5:04 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-06 5:04 [PATCH v1 00/26] x86: Introduce centralized CPUID model Ahmed S. Darwish
2025-05-06 5:04 ` Ahmed S. Darwish [this message]
2025-05-06 8:06 ` [tip: x86/cpu] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.4 tip-bot2 for Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 02/26] x86/cpu: Sanitize CPUID(0x80000000) output Ahmed S. Darwish
2025-05-06 8:15 ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2025-05-07 8:50 ` [PATCH v1 02/26] " Andrew Cooper
2025-05-08 20:40 ` H. Peter Anvin
2025-05-08 20:58 ` Andrew Cooper
2025-05-08 22:37 ` H. Peter Anvin
2025-05-09 9:23 ` Ahmed S. Darwish (dev)
2025-05-06 5:04 ` [PATCH v1 03/26] x86/cpuid: Introduce <asm/cpuid/leaves.h> Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 04/26] x86/cpuid: Introduce centralized CPUID data Ahmed S. Darwish
2025-05-14 4:18 ` Sohil Mehta
2025-05-15 21:23 ` Ahmed S. Darwish
2025-05-15 22:12 ` Sohil Mehta
2025-05-06 5:04 ` [PATCH v1 05/26] x86/cpuid: Introduce CPUID scanner Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 06/26] x86/cpuid: Scan CPUID(0x80000000) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 07/26] x86/cpuid: Introduce debugfs 'x86/scanned_cpuid/[0-ncpus]' Ahmed S. Darwish
2025-05-14 2:56 ` Sohil Mehta
2025-05-15 21:04 ` Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 08/26] x86/cpuid: Introduce external CPUID table accessors Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 09/26] x86/cpu: Use scanned CPUID(0x0) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 10/26] x86/cpu: Use scanned CPUID(0x80000001) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 11/26] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 12/26] x86/cpu: Use scanned CPUID(0x1) Ahmed S. Darwish
2025-05-06 8:25 ` Ingo Molnar
2025-05-07 7:36 ` Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 13/26] x86/cpuid: Scan CPUID(0x2) Ahmed S. Darwish
2025-05-06 8:16 ` Ingo Molnar
2025-05-06 8:47 ` Ahmed S. Darwish
2025-05-06 10:39 ` Ingo Molnar
2025-05-06 5:04 ` [PATCH v1 14/26] x86/cpuid: Introduce scanned CPUID(0x2) API Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 15/26] x86/cpu: Use scanned CPUID(0x2) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 16/26] x86/cacheinfo: " Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 17/26] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-05-06 8:59 ` Ingo Molnar
2025-05-07 9:15 ` Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 18/26] x86/cpuid: Scan deterministic cache params CPUID leaves Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 19/26] x86/cacheinfo: Use scanned CPUID(0x4) Ahmed S. Darwish
2025-05-06 8:10 ` Ingo Molnar
2025-05-06 8:50 ` Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 20/26] x86/cacheinfo: Use scanned CPUID(0x8000001d) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 21/26] x86/cpuid: Scan CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 22/26] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 23/26] x86/cacheinfo: Use scanned CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 24/26] x86/cpuid: scanner: Add CPUID table rescan support Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 25/26] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-05-06 5:04 ` [PATCH v1 26/26] x86/cpu: Rescan CPUID table after unlocking the full CPUID range Ahmed S. Darwish
2025-05-06 8:23 ` [PATCH v1 00/26] x86: Introduce centralized CPUID model Ingo Molnar
2025-05-06 8:48 ` Ahmed S. Darwish
2025-05-06 9:12 ` Ingo Molnar
2025-05-07 8:35 ` Ahmed S. Darwish
2025-05-07 8:45 ` Ahmed S. Darwish
2025-05-07 9:32 ` Ahmed S. Darwish
2025-05-09 9:28 ` Ahmed S. Darwish (dev)
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