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From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	John Ogness <john.ogness@linutronix.de>,
	x86@kernel.org, x86-cpuid@lists.linux.dev,
	LKML <linux-kernel@vger.kernel.org>,
	"Ahmed S. Darwish" <darwi@linutronix.de>
Subject: [PATCH v1 21/26] x86/cpuid: Scan CPUID(0x80000005) and CPUID(0x80000006)
Date: Tue,  6 May 2025 07:04:32 +0200	[thread overview]
Message-ID: <20250506050437.10264-22-darwi@linutronix.de> (raw)
In-Reply-To: <20250506050437.10264-1-darwi@linutronix.de>

Scan AMD cacheinfo CPUID(0x80000005) and CPUID(0x80000006), if available,
using the generic CPUID scanner read function cpuid_read_generic().

Follow-up commits will switch the x86/cacheinfo AMD CPUID(0x4)-emulation
logic to the scanned CPUID table API.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
---
 arch/x86/include/asm/cpuid/types.h  | 2 ++
 arch/x86/kernel/cpu/cpuid_scanner.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index 2ac3d05c3fe4..50280bbc01d6 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -183,6 +183,8 @@ struct cpuid_leaves {
 	CPUID_LEAF(0x2,		0,		1);
 	CPUID_LEAF(0x4,		0,		8);
 	CPUID_LEAF(0x80000000,	0,		1);
+	CPUID_LEAF(0x80000005,	0,		1);
+	CPUID_LEAF(0x80000006,	0,		1);
 	CPUID_LEAF(0x8000001d,	0,		8);
 };
 
diff --git a/arch/x86/kernel/cpu/cpuid_scanner.h b/arch/x86/kernel/cpu/cpuid_scanner.h
index a09110a4c72c..42d88732b1f5 100644
--- a/arch/x86/kernel/cpu/cpuid_scanner.h
+++ b/arch/x86/kernel/cpu/cpuid_scanner.h
@@ -95,6 +95,8 @@ struct cpuid_scan_entry {
 	SCAN_ENTRY(0x2,		0,		0x2),				\
 	SCAN_ENTRY(0x4,		0,		deterministic_cache),		\
 	SCAN_ENTRY(0x80000000,  0,              0x80000000),			\
+	SCAN_ENTRY(0x80000005,  0,              generic),			\
+	SCAN_ENTRY(0x80000006,  0,              generic),			\
 	SCAN_ENTRY(0x8000001d,  0,              deterministic_cache),		\
 
 /**
-- 
2.49.0


  parent reply	other threads:[~2025-05-06  5:05 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06  5:04 [PATCH v1 00/26] x86: Introduce centralized CPUID model Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 01/26] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.4 Ahmed S. Darwish
2025-05-06  8:06   ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 02/26] x86/cpu: Sanitize CPUID(0x80000000) output Ahmed S. Darwish
2025-05-06  8:15   ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2025-05-07  8:50   ` [PATCH v1 02/26] " Andrew Cooper
2025-05-08 20:40     ` H. Peter Anvin
2025-05-08 20:58       ` Andrew Cooper
2025-05-08 22:37         ` H. Peter Anvin
2025-05-09  9:23     ` Ahmed S. Darwish (dev)
2025-05-06  5:04 ` [PATCH v1 03/26] x86/cpuid: Introduce <asm/cpuid/leaves.h> Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 04/26] x86/cpuid: Introduce centralized CPUID data Ahmed S. Darwish
2025-05-14  4:18   ` Sohil Mehta
2025-05-15 21:23     ` Ahmed S. Darwish
2025-05-15 22:12       ` Sohil Mehta
2025-05-06  5:04 ` [PATCH v1 05/26] x86/cpuid: Introduce CPUID scanner Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 06/26] x86/cpuid: Scan CPUID(0x80000000) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 07/26] x86/cpuid: Introduce debugfs 'x86/scanned_cpuid/[0-ncpus]' Ahmed S. Darwish
2025-05-14  2:56   ` Sohil Mehta
2025-05-15 21:04     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 08/26] x86/cpuid: Introduce external CPUID table accessors Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 09/26] x86/cpu: Use scanned CPUID(0x0) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 10/26] x86/cpu: Use scanned CPUID(0x80000001) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 11/26] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 12/26] x86/cpu: Use scanned CPUID(0x1) Ahmed S. Darwish
2025-05-06  8:25   ` Ingo Molnar
2025-05-07  7:36     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 13/26] x86/cpuid: Scan CPUID(0x2) Ahmed S. Darwish
2025-05-06  8:16   ` Ingo Molnar
2025-05-06  8:47     ` Ahmed S. Darwish
2025-05-06 10:39       ` Ingo Molnar
2025-05-06  5:04 ` [PATCH v1 14/26] x86/cpuid: Introduce scanned CPUID(0x2) API Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 15/26] x86/cpu: Use scanned CPUID(0x2) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 16/26] x86/cacheinfo: " Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 17/26] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-05-06  8:59   ` Ingo Molnar
2025-05-07  9:15     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 18/26] x86/cpuid: Scan deterministic cache params CPUID leaves Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 19/26] x86/cacheinfo: Use scanned CPUID(0x4) Ahmed S. Darwish
2025-05-06  8:10   ` Ingo Molnar
2025-05-06  8:50     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 20/26] x86/cacheinfo: Use scanned CPUID(0x8000001d) Ahmed S. Darwish
2025-05-06  5:04 ` Ahmed S. Darwish [this message]
2025-05-06  5:04 ` [PATCH v1 22/26] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 23/26] x86/cacheinfo: Use scanned CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 24/26] x86/cpuid: scanner: Add CPUID table rescan support Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 25/26] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 26/26] x86/cpu: Rescan CPUID table after unlocking the full CPUID range Ahmed S. Darwish
2025-05-06  8:23 ` [PATCH v1 00/26] x86: Introduce centralized CPUID model Ingo Molnar
2025-05-06  8:48   ` Ahmed S. Darwish
2025-05-06  9:12 ` Ingo Molnar
2025-05-07  8:35   ` Ahmed S. Darwish
2025-05-07  8:45     ` Ahmed S. Darwish
2025-05-07  9:32   ` Ahmed S. Darwish
2025-05-09  9:28     ` Ahmed S. Darwish (dev)

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