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From: "Ahmed S. Darwish" <darwi@linutronix.de>
To: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	John Ogness <john.ogness@linutronix.de>,
	x86@kernel.org, x86-cpuid@lists.linux.dev,
	LKML <linux-kernel@vger.kernel.org>,
	"Ahmed S. Darwish" <darwi@linutronix.de>
Subject: [PATCH v1 06/26] x86/cpuid: Scan CPUID(0x80000000)
Date: Tue,  6 May 2025 07:04:17 +0200	[thread overview]
Message-ID: <20250506050437.10264-7-darwi@linutronix.de> (raw)
In-Reply-To: <20250506050437.10264-1-darwi@linutronix.de>

Add CPUID scanner logic for CPUID(0x80000000).

Similar to kernel/head_32.S and kernel/cpu/common.c, verify the
CPUID(0x80000000) query output beforehand.  This is due to x86-32
machines without an extended CPUID range, where a CPUID(0x80000000) query
will just repeat the max-valid standard CPUID leaf output.

References: 8a50e5135af0 ("x86-32: Use symbolic constants, safer CPUID when enabling EFER.NX")
References: 67ad24e6d39c ("- pre5:    - Rasmus Andersen: add proper...")  # Historical git
Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Link: https://lore.kernel.org/r/d4fcfd91-cc92-4b3c-9dd2-56ecd754cecc@citrix.com
---
 arch/x86/include/asm/cpuid/types.h  |  7 ++++++-
 arch/x86/kernel/cpu/cpuid_scanner.c | 22 +++++++++++++++++++++-
 arch/x86/kernel/cpu/cpuid_scanner.h |  1 +
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h
index 6150cb0fa77e..51b7e1b59ea5 100644
--- a/arch/x86/include/asm/cpuid/types.h
+++ b/arch/x86/include/asm/cpuid/types.h
@@ -33,7 +33,11 @@ enum cpuid_regs_idx {
 #define CPUID_LEAF_TILE		0x1d
 
 #define CPUID_BASE_START	0x0
-#define CPUID_BASE_END		(CPUID_BASE_START + 0xffff)
+#define CPUID_EXT_START		0x80000000
+
+#define __CPUID_RANGE_END(idx)	((idx) + 0xffff)
+#define CPUID_BASE_END		__CPUID_RANGE_END(CPUID_BASE_START)
+#define CPUID_EXT_END		__CPUID_RANGE_END(CPUID_EXT_START)
 
 /*
  * Types for CPUID(0x2) parsing
@@ -176,6 +180,7 @@ struct cpuid_leaves {
 	/*         leaf		subleaf		count */
 	CPUID_LEAF(0x0,		0,		1);
 	CPUID_LEAF(0x1,		0,		1);
+	CPUID_LEAF(0x80000000,	0,		1);
 };
 
 /**
diff --git a/arch/x86/kernel/cpu/cpuid_scanner.c b/arch/x86/kernel/cpu/cpuid_scanner.c
index 8f290047b661..ec45c441bde5 100644
--- a/arch/x86/kernel/cpu/cpuid_scanner.c
+++ b/arch/x86/kernel/cpu/cpuid_scanner.c
@@ -20,10 +20,29 @@ static void cpuid_read_generic(const struct cpuid_scan_entry *e, struct cpuid_re
 		cpuid_subleaf(e->leaf, e->subleaf + i, output->leaf);
 }
 
+static void cpuid_read_0x80000000(const struct cpuid_scan_entry *e, struct cpuid_read_output *output)
+{
+	struct leaf_0x80000000_0 *el0 = (struct leaf_0x80000000_0 *)output->leaf;
+
+	cpuid_subleaf(e->leaf, e->subleaf, el0);
+
+	/*
+	 * Protect against 32-bit CPUs lacking extended CPUID support: Max
+	 * extended CPUID leaf must be in the 0x80000001-0x8000ffff range.
+	 */
+	if ((el0->max_ext_leaf & 0xffff0000) != 0x80000000) {
+		*el0 = (struct leaf_0x80000000_0){ };
+		return;
+	}
+
+	output->info->nr_entries = 1;
+}
+
 static unsigned int cpuid_range_max_leaf(const struct cpuid_leaves *leaves, unsigned int range)
 {
 	switch (range) {
 	case CPUID_BASE_START:	return cpuid_get(leaves, 0x0).max_std_leaf;
+	case CPUID_EXT_START:   return cpuid_get(leaves, 0x80000000).max_ext_leaf;
 	default:		return 0;
 	}
 }
@@ -39,7 +58,8 @@ cpuid_range_valid(const struct cpuid_leaves *l, unsigned int leaf, unsigned int
 
 static bool cpuid_leaf_valid(const struct cpuid_leaves *l, unsigned int leaf)
 {
-	return cpuid_range_valid(l, leaf, CPUID_BASE_START, CPUID_BASE_END);
+	return	cpuid_range_valid(l, leaf, CPUID_BASE_START, CPUID_BASE_END) ||
+		cpuid_range_valid(l, leaf, CPUID_EXT_START, CPUID_EXT_END);
 }
 
 static const struct cpuid_scan_entry cpuid_common_scan_entries[] = {
diff --git a/arch/x86/kernel/cpu/cpuid_scanner.h b/arch/x86/kernel/cpu/cpuid_scanner.h
index ff34b478c74f..b3e4676ab7f7 100644
--- a/arch/x86/kernel/cpu/cpuid_scanner.h
+++ b/arch/x86/kernel/cpu/cpuid_scanner.h
@@ -92,6 +92,7 @@ struct cpuid_scan_entry {
 	/*	   leaf		subleaf		reader */			\
 	SCAN_ENTRY(0x0,		0,		generic),			\
 	SCAN_ENTRY(0x1,		0,		generic),			\
+	SCAN_ENTRY(0x80000000,  0,              0x80000000),
 
 /**
  * struct cpuid_scan_info - Parameters for generic CPUID scan logic
-- 
2.49.0


  parent reply	other threads:[~2025-05-06  5:05 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06  5:04 [PATCH v1 00/26] x86: Introduce centralized CPUID model Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 01/26] tools/x86/kcpuid: Update bitfields to x86-cpuid-db v2.4 Ahmed S. Darwish
2025-05-06  8:06   ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 02/26] x86/cpu: Sanitize CPUID(0x80000000) output Ahmed S. Darwish
2025-05-06  8:15   ` [tip: x86/cpu] " tip-bot2 for Ahmed S. Darwish
2025-05-07  8:50   ` [PATCH v1 02/26] " Andrew Cooper
2025-05-08 20:40     ` H. Peter Anvin
2025-05-08 20:58       ` Andrew Cooper
2025-05-08 22:37         ` H. Peter Anvin
2025-05-09  9:23     ` Ahmed S. Darwish (dev)
2025-05-06  5:04 ` [PATCH v1 03/26] x86/cpuid: Introduce <asm/cpuid/leaves.h> Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 04/26] x86/cpuid: Introduce centralized CPUID data Ahmed S. Darwish
2025-05-14  4:18   ` Sohil Mehta
2025-05-15 21:23     ` Ahmed S. Darwish
2025-05-15 22:12       ` Sohil Mehta
2025-05-06  5:04 ` [PATCH v1 05/26] x86/cpuid: Introduce CPUID scanner Ahmed S. Darwish
2025-05-06  5:04 ` Ahmed S. Darwish [this message]
2025-05-06  5:04 ` [PATCH v1 07/26] x86/cpuid: Introduce debugfs 'x86/scanned_cpuid/[0-ncpus]' Ahmed S. Darwish
2025-05-14  2:56   ` Sohil Mehta
2025-05-15 21:04     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 08/26] x86/cpuid: Introduce external CPUID table accessors Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 09/26] x86/cpu: Use scanned CPUID(0x0) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 10/26] x86/cpu: Use scanned CPUID(0x80000001) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 11/26] x86/lib: Add CPUID(0x1) CPU family and model calculation Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 12/26] x86/cpu: Use scanned CPUID(0x1) Ahmed S. Darwish
2025-05-06  8:25   ` Ingo Molnar
2025-05-07  7:36     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 13/26] x86/cpuid: Scan CPUID(0x2) Ahmed S. Darwish
2025-05-06  8:16   ` Ingo Molnar
2025-05-06  8:47     ` Ahmed S. Darwish
2025-05-06 10:39       ` Ingo Molnar
2025-05-06  5:04 ` [PATCH v1 14/26] x86/cpuid: Introduce scanned CPUID(0x2) API Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 15/26] x86/cpu: Use scanned CPUID(0x2) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 16/26] x86/cacheinfo: " Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 17/26] x86/cpuid: Remove direct CPUID(0x2) query API Ahmed S. Darwish
2025-05-06  8:59   ` Ingo Molnar
2025-05-07  9:15     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 18/26] x86/cpuid: Scan deterministic cache params CPUID leaves Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 19/26] x86/cacheinfo: Use scanned CPUID(0x4) Ahmed S. Darwish
2025-05-06  8:10   ` Ingo Molnar
2025-05-06  8:50     ` Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 20/26] x86/cacheinfo: Use scanned CPUID(0x8000001d) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 21/26] x86/cpuid: Scan CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 22/26] x86/cacheinfo: Use auto-generated data types Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 23/26] x86/cacheinfo: Use scanned CPUID(0x80000005) and CPUID(0x80000006) Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 24/26] x86/cpuid: scanner: Add CPUID table rescan support Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 25/26] x86/cpu: Rescan CPUID table after PSN disable Ahmed S. Darwish
2025-05-06  5:04 ` [PATCH v1 26/26] x86/cpu: Rescan CPUID table after unlocking the full CPUID range Ahmed S. Darwish
2025-05-06  8:23 ` [PATCH v1 00/26] x86: Introduce centralized CPUID model Ingo Molnar
2025-05-06  8:48   ` Ahmed S. Darwish
2025-05-06  9:12 ` Ingo Molnar
2025-05-07  8:35   ` Ahmed S. Darwish
2025-05-07  8:45     ` Ahmed S. Darwish
2025-05-07  9:32   ` Ahmed S. Darwish
2025-05-09  9:28     ` Ahmed S. Darwish (dev)

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