From: Peter Zijlstra <peterz@infradead.org>
To: "Xin Li (Intel)" <xin@zytor.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
seanjc@google.com, pbonzini@redhat.com, sohil.mehta@intel.com,
brgerst@gmail.com, tony.luck@intel.com, fenghuay@nvidia.com
Subject: Re: [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value
Date: Tue, 17 Jun 2025 11:03:29 +0200 [thread overview]
Message-ID: <20250617090329.GO1613376@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <20250617073234.1020644-2-xin@zytor.com>
On Tue, Jun 17, 2025 at 12:32:33AM -0700, Xin Li (Intel) wrote:
> diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
> index 8feb8fd2957a..3bd7c9ac7576 100644
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -2243,20 +2243,17 @@ EXPORT_PER_CPU_SYMBOL(__stack_chk_guard);
> #endif
> #endif
>
> -/*
> - * Clear all 6 debug registers:
> - */
> -static void clear_all_debug_regs(void)
> +static void initialize_debug_regs(void)
> {
> int i;
>
> - for (i = 0; i < 8; i++) {
> - /* Ignore db4, db5 */
> - if ((i == 4) || (i == 5))
> - continue;
> + /* Control register first */
> + set_debugreg(0, 7);
> + set_debugreg(DR6_RESERVED, 6);
>
> + /* Ignore db4, db5 */
> + for (i = 0; i < 4; i++)
> set_debugreg(0, i);
> - }
> }
>
> #ifdef CONFIG_KGDB
Maybe like so?
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -2206,15 +2206,14 @@ EXPORT_PER_CPU_SYMBOL(__stack_chk_guard)
static void initialize_debug_regs(void)
{
- int i;
-
- /* Control register first */
+ /* Control register first -- to make sure everything is disabled. */
set_debugreg(0, 7);
set_debugreg(DR6_RESERVED, 6);
-
- /* Ignore db4, db5 */
- for (i = 0; i < 4; i++)
- set_debugreg(0, i);
+ /* dr5 and dr4 don't exist */
+ set_debugreg(0, 3);
+ set_debugreg(0, 2);
+ set_debugreg(0, 1);
+ set_debugreg(0, 0);
}
#ifdef CONFIG_KGDB
next prev parent reply other threads:[~2025-06-17 9:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 7:32 [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization Xin Li (Intel)
2025-06-17 7:32 ` [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value Xin Li (Intel)
2025-06-17 9:03 ` Peter Zijlstra [this message]
2025-06-17 22:49 ` Xin Li
2025-06-17 18:23 ` Sohil Mehta
2025-06-17 20:47 ` Sean Christopherson
2025-06-17 23:10 ` Sohil Mehta
2025-06-18 0:42 ` Xin Li
2025-06-17 23:57 ` Xin Li
2025-06-18 21:24 ` Sean Christopherson
2025-06-18 21:55 ` Xin Li
2025-06-19 5:16 ` Maciej W. Rozycki
2025-06-17 7:32 ` [PATCH v2 2/2] x86/traps: Initialize DR7 " Xin Li (Intel)
2025-06-17 13:35 ` Sean Christopherson
2025-06-17 23:08 ` Xin Li
2025-06-18 0:15 ` Xin Li
2025-06-18 3:34 ` H. Peter Anvin
2025-06-17 23:10 ` Sohil Mehta
2025-06-18 0:44 ` Xin Li
2025-06-17 9:05 ` [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization Peter Zijlstra
2025-06-17 17:55 ` Sohil Mehta
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