From: Sohil Mehta <sohil.mehta@intel.com>
To: Sean Christopherson <seanjc@google.com>
Cc: "Xin Li (Intel)" <xin@zytor.com>, <linux-kernel@vger.kernel.org>,
<kvm@vger.kernel.org>, <tglx@linutronix.de>, <mingo@redhat.com>,
<bp@alien8.de>, <dave.hansen@linux.intel.com>, <x86@kernel.org>,
<hpa@zytor.com>, <pbonzini@redhat.com>, <peterz@infradead.org>,
<brgerst@gmail.com>, <tony.luck@intel.com>, <fenghuay@nvidia.com>
Subject: Re: [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value
Date: Tue, 17 Jun 2025 16:10:26 -0700 [thread overview]
Message-ID: <276d66a1-dafe-4ed8-aefd-8f60e34ff575@intel.com> (raw)
In-Reply-To: <aFHUZh6koJyVi3p-@google.com>
On 6/17/2025 1:47 PM, Sean Christopherson wrote:
> Ah, and now I see that DR6_RESERVED is an existing #define in a uAPI header (Xin
> said there were a few, but I somehow missed them earlier). Maybe just leave that
> thing alone, but update the comment to state that it's a historical wart? And
> then put DR6_ACTIVE_LOW and other macros in arch/x86/include/asm/debugreg.h?
>
Yeah, that's unfortunate. Updating the comment seems the best we do for now.
> /*
> * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
> * We can regard all the bits in DR6_FIXED_1 as active_low bits;
> * they will never be 0 for now, but when they are defined
> * in the future it will require no code change.
> *
> * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
> */
> #define DR6_ACTIVE_LOW 0xffff0ff0
> #define DR6_VOLATILE 0x0001e80f
> #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
next prev parent reply other threads:[~2025-06-17 23:10 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 7:32 [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization Xin Li (Intel)
2025-06-17 7:32 ` [PATCH v2 1/2] x86/traps: Initialize DR6 by writing its architectural reset value Xin Li (Intel)
2025-06-17 9:03 ` Peter Zijlstra
2025-06-17 22:49 ` Xin Li
2025-06-17 18:23 ` Sohil Mehta
2025-06-17 20:47 ` Sean Christopherson
2025-06-17 23:10 ` Sohil Mehta [this message]
2025-06-18 0:42 ` Xin Li
2025-06-17 23:57 ` Xin Li
2025-06-18 21:24 ` Sean Christopherson
2025-06-18 21:55 ` Xin Li
2025-06-19 5:16 ` Maciej W. Rozycki
2025-06-17 7:32 ` [PATCH v2 2/2] x86/traps: Initialize DR7 " Xin Li (Intel)
2025-06-17 13:35 ` Sean Christopherson
2025-06-17 23:08 ` Xin Li
2025-06-18 0:15 ` Xin Li
2025-06-18 3:34 ` H. Peter Anvin
2025-06-17 23:10 ` Sohil Mehta
2025-06-18 0:44 ` Xin Li
2025-06-17 9:05 ` [PATCH v2 0/2] x86/traps: Fix DR6/DR7 initialization Peter Zijlstra
2025-06-17 17:55 ` Sohil Mehta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=276d66a1-dafe-4ed8-aefd-8f60e34ff575@intel.com \
--to=sohil.mehta@intel.com \
--cc=bp@alien8.de \
--cc=brgerst@gmail.com \
--cc=dave.hansen@linux.intel.com \
--cc=fenghuay@nvidia.com \
--cc=hpa@zytor.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=seanjc@google.com \
--cc=tglx@linutronix.de \
--cc=tony.luck@intel.com \
--cc=x86@kernel.org \
--cc=xin@zytor.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®